MV

Mehul R. Vashi

AM AMD: 18 patents #607 of 9,279Top 7%
Overall (All Time): #250,617 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12148464 Current leakage management controller for reading from memory cells Michael Tsivyan, Shidong Zhou, Karthy Rajasekharan, Weiguang Lu, Jing Jing Chen 2024-11-19
7624209 Method of and circuit for enabling variable latency data transfers Ahmad R. Ansari, Alex S. Warshofsky 2009-11-24
7420392 Programmable gate array and embedded circuitry initialization and processing David P. Schultz, Stephen M. Douglass, Steven P. Young, Nigel G. Herron, Jane W. Sowards 2008-09-02
7418679 Method of enabling timing verification of a circuit design Alex S. Warshofsky 2008-08-26
7406670 Testing of an integrated circuit having an embedded processor Ahmad R. Ansari, Nigel G. Herron, Stephen M. Douglass 2008-07-29
7401258 Circuit for and method of accessing instruction data written to a memory Ying Fang 2008-07-15
7333909 Method of and circuit for verifying a data transfer protocol Alex S. Warshofsky 2008-02-19
7269805 Testing of an integrated circuit having an embedded processor Ahmad R. Ansari, Nigel G. Herron, Stephen M. Douglass 2007-09-11
7139673 Method of and circuit for verifying a data transfer protocol Alex S. Warshofsky 2006-11-21
7117471 Generation of design views having consistent input/output pin definitions Huimou Juliana Li, Qingqi Wang, Andy H. Gan 2006-10-03
7007121 Method and apparatus for synchronized buses Ahmad R. Ansari 2006-02-28
6976160 Method and system for controlling default values of flip-flops in PGA/ASIC-based designs Robert Yin 2005-12-13
6798239 Programmable gate array having interconnecting logic to support embedded fixed logic circuitry Stephen M. Douglass, Steven P. Young, Nigel G. Herron, Jane W. Sowards 2004-09-28
6662285 User configurable memory system having local and global memory blocks Stephen M. Douglass, Prasad L. Sastry, Robert Yin 2003-12-09
6625788 Method for verifying timing in a hard-wired IC device modeled from an FPGA Kiran B. Buch 2003-09-23
6522167 User configurable on-chip memory system Ahmad R. Ansari, Stephen M. Douglass, Steven P. Young 2003-02-18
6219819 Method for verifying timing in a hard-wired IC device modeled from an FPGA Kiran B. Buch 2001-04-17
6070260 Test methodology based on multiple skewed scan clocks Kiran B. Buch 2000-05-30