SD

Stephen M. Douglass

AM AMD: 12 patents #986 of 9,279Top 15%
Cypress Semiconductor: 11 patents #166 of 1,852Top 9%
IBM: 1 patents #44,794 of 70,183Top 65%
Overall (All Time): #186,200 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7539848 Configurable logic fabric including two fixed logic processors with individual interface to receive availability signal from custom operation code configured processor Ahmad R. Ansari 2009-05-26
7420392 Programmable gate array and embedded circuitry initialization and processing David P. Schultz, Steven P. Young, Nigel G. Herron, Mehul R. Vashi, Jane W. Sowards 2008-09-02
7406670 Testing of an integrated circuit having an embedded processor Ahmad R. Ansari, Mehul R. Vashi, Nigel G. Herron 2008-07-29
7269805 Testing of an integrated circuit having an embedded processor Ahmad R. Ansari, Mehul R. Vashi, Nigel G. Herron 2007-09-11
7231621 Speed verification of an embedded processor in a programmable logic device Nigel G. Herron, Ahmad R. Ansari, Anthony Correale, Jr., Leslie Mark DeBruyne 2007-06-12
7194600 Method and apparatus for processing data with a programmable gate array using fixed and programmable processors Ahmad R. Ansari 2007-03-20
6961919 Method of designing integrated circuit having both configurable and fixed logic circuitry — 2005-11-01
6886092 Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion Ahmad R. Ansari 2005-04-26
6798239 Programmable gate array having interconnecting logic to support embedded fixed logic circuitry Steven P. Young, Nigel G. Herron, Mehul R. Vashi, Jane W. Sowards 2004-09-28
6693452 Floor planning for programmable gate array having embedded fixed logic circuitry Ahmad R. Ansari 2004-02-17
6662285 User configurable memory system having local and global memory blocks Prasad L. Sastry, Mehul R. Vashi, Robert Yin 2003-12-09
6522167 User configurable on-chip memory system Ahmad R. Ansari, Mehul R. Vashi, Steven P. Young 2003-02-18
RE37577 High speed configuration independent programmable macrocell Lin-Shih Liu, Syed Babar Raza, Hagop Nazarian, George M. Ansel, Jeffrey Scott Hunt 2002-03-12
6243664 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability Hagop Nazarian, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin +1 more 2001-06-05
5923868 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability Hagop Nazarian, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin +1 more 1999-07-13
5848066 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability Hagop Nazarian, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin +1 more 1998-12-08
5701092 OR array architecture for a programmable logic device Norman P. Taffe, Hagop Nazarian 1997-12-23
5689686 Methods for maximizing routability in a programmable interconnect matrix having less than full connectability Hagop Nazarian, W. Alfred Graf, S. Babar Raza, Sundar Rajan, Shiva Sorooshian Borzin +1 more 1997-11-18
5621338 High speed configuration independent programmable macrocell Lin-Shih Liu, Syed Babar Raza, Hagop Nazarian, George M. Ansel, Jeffery Scott Hunt 1997-04-15
5502403 High speed configuration independent programmable macrocell Lin-Shih Liu, Syed Babar Raza, Hagop Nazarian, George M. Ansel, Jeffery Scott Hunt 1996-03-26
5467029 OR array architecture for a programmable logic device Norman P. Taffe, Hagop Nazarian 1995-11-14
5023484 Architecture of high speed synchronous state machine Jagdish Pathak, Dov-Ami Vider, Hal Kurkowski 1991-06-11
4879481 Dual I/O macrocell for high speed synchronous state machine Jagdish Pathak, Dov-Ami Vider 1989-11-07