SR

S. Babar Raza

Cypress Semiconductor: 48 patents #8 of 1,852Top 1%
Overall (All Time): #56,851 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 25 most recent of 49 patents

Patent #TitleCo-InventorsDate
7934057 Logic for implementing a dual clock domain read access with predictable timing for bi-directional inputs/outputs 2011-04-26
7738496 Device that provides the functionality of dual-ported memory using single-ported memory for multiple clock domains 2010-06-15
7382805 Method and apparatus for aggregating Ethernet streams Edward L. Grivna 2008-06-03
7343510 Method and device for selecting one of multiple clock signals based on frequency differences of such clock signals Mark A. Ross, Dimitris Pantelakis, Anup Nayak, Walter F. Bridgewater 2008-03-11
7334147 Method and architecture for synchronizing a path generator and/or extractor to a processor 2008-02-19
7184359 System and method for staging concurrent accesses to a memory address location via a single port using a high speed sampling clock Walter F. Bridgewater, Anup Nayak, Dimitris Pantelakis 2007-02-27
7016349 Logic for generating multicast/unicast address (es) Somnath Paul 2006-03-21
6925506 Architecture for implementing virtual multiqueue fifos Somnath Paul 2005-08-02
6917661 Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detector Paul H. Scott 2005-07-12
6816979 Configurable fast clock detection logic with programmable resolution Jiann-Cheng Chen, Somnath Paul 2004-11-09
6816955 Logic for providing arbitration for synchronous dual-port memory Somnath Paul 2004-11-09
6810098 FIFO read interface protocol Somnath Paul 2004-10-26
6715021 Out-of-band look-ahead arbitration method and/or architecture Somnath Paul 2004-03-30
6665265 Overhead serial communication scheme 2003-12-16
6657472 Circuit, system, and method for programmably setting an input to a prioritizer of a latch to avoid a non-desired output state of the latch Steven C. Meyers 2003-12-02
6640300 Method and apparatus for width and depth expansion in a multi-queue system 2003-10-28
6640267 Architecture for multi-queue storage element 2003-10-28
6631455 Logic for initializing the depth of the queue pointer memory Somnath Paul 2003-10-07
6629226 Fifo read interface protocol Somnath Paul 2003-09-30
6628656 Circuit, method and/or architecture for improving the performance of a serial communication link 2003-09-30
6625177 Circuit, method and/or architecture for improving the performance of a serial communication link 2003-09-23
6625711 Method and/or architecture for implementing queue expansion in multiqueue devices Somnath Paul 2003-09-23
6603771 Highly scalable architecture for implementing switch fabrics with quality of services 2003-08-05
6584517 Circuit and method for supporting multicast/broadcast operations in multi-queue storage devices 2003-06-24
6581144 Method and logic for initializing the forward-pointer memory during normal operation of the device as a background process Somnath Paul 2003-06-17