| 9176727 |
Infrastructure software patch reporting and analytics |
Gautam Bhasin |
2015-11-03 |
| 6487139 |
Memory row line driver circuit |
— |
2002-11-26 |
| 6411549 |
Reference cell for high speed sensing in non-volatile memories |
Saroj Pathak, James E. Payne |
2002-06-25 |
| 5936444 |
Zero power power-on reset circuit |
Saroj Pathak, Glen Arnold Rosendale, James E. Payne, Nianglamching Hangzo |
1999-08-10 |
| 5917754 |
Semiconductor memory having a current balancing circuit |
Saroj Pathak |
1999-06-29 |
| 5828603 |
Memory device having a power supply-independent low power consumption bit line voltage clamp |
— |
1998-10-27 |
| 5731734 |
Zero power fuse circuit |
James E. Payne, Saroj Pathak |
1998-03-24 |
| 5621738 |
Method for programming flash EEPROM devices |
John Caywood |
1997-04-15 |
| 5270980 |
Sector erasable flash EEPROM |
John Caywood, Timothy J. Tredwell, Constantine N. Anagnostopoulos |
1993-12-14 |
| 5023484 |
Architecture of high speed synchronous state machine |
Stephen M. Douglass, Dov-Ami Vider, Hal Kurkowski |
1991-06-11 |
| 4879481 |
Dual I/O macrocell for high speed synchronous state machine |
Stephen M. Douglass, Dov-Ami Vider |
1989-11-07 |
| 4851720 |
Low power sense amplifier for programmable logic device |
Stephen M. Douglas, Hal Kurkowski, Dov-Ami Vider |
1989-07-25 |
