Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12097330 | Massage apparatus, system and method capable of deriving a parameter of an individual | Kia Tong Tan, Gilbert Realuyo, Rui Zou | 2024-09-24 |
| 6625788 | Method for verifying timing in a hard-wired IC device modeled from an FPGA | Mehul R. Vashi | 2003-09-23 |
| 6353921 | Hardwire logic device emulating any of two or more FPGAs | Edwin S. Law, Glenn A. Baxter, Raymond C. Pang | 2002-03-05 |
| 6226779 | Programmable IC with gate array core and boundary scan capability | Glenn A. Baxter, Edwin S. Law | 2001-05-01 |
| 6219819 | Method for verifying timing in a hard-wired IC device modeled from an FPGA | Mehul R. Vashi | 2001-04-17 |
| 6134517 | Method of implementing a boundary scan chain | Glenn A. Baxter, Raymond C. Pang, Edwin S. Law | 2000-10-17 |
| 6120551 | Hardwire logic device emulating an FPGA | Edwin S. Law, Glenn A. Baxter, Raymond C. Pang | 2000-09-19 |
| 6071314 | Programmable I/O cell with dual boundary scan | Glenn A. Baxter, Edwin S. Law | 2000-06-06 |
| 6070260 | Test methodology based on multiple skewed scan clocks | Mehul R. Vashi | 2000-05-30 |
| 5991908 | Boundary scan chain with dedicated programmable routing | Glenn A. Baxter, Raymond C. Pang, Edwin S. Law | 1999-11-23 |
| 5550839 | Mask-programmed integrated circuits having timing and logic compatibility to user-configured logic arrays | Edwin S. Law, Jakong J. Chu | 1996-08-27 |