Issued Patents All Time
Showing 51–69 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6445245 | Digitally controlled impedance for I/O of an integrated circuit device | Suresh M. Menon, Eunice Y. D. Hao, Jason R. Bergendahl, Jian Tan | 2002-09-03 |
| 6429682 | Configuration bus interface circuit for FPGAs | Lawrence C. Hung, F. Erich Goetting | 2002-08-06 |
| 6366128 | Circuit for producing low-voltage differential signals | Atul V. Ghia, Suresh M. Menon | 2002-04-02 |
| 6353334 | Circuit for converting a logic signal on an output node to a pair of low-voltage differential signals | Brian Von Herzen, Jon A. Brunetti | 2002-03-05 |
| 6323681 | Circuits and methods for operating a multiplexer array | Roman Iwanczuk, Steven P. Young | 2001-11-27 |
| 6262596 | Configuration bus interface circuit for FPGAS | Lawrence C. Hung, F. Erich Goetting | 2001-07-17 |
| 6255848 | Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA | Steven P. Young, Lawrence C. Hung | 2001-07-03 |
| 6204687 | Method and structure for configuring FPGAS | Lawrence C. Hung, F. Erich Goetting | 2001-03-20 |
| 6191613 | Programmable logic device with delay-locked loop | Lawrence C. Hung, F. Erich Goetting | 2001-02-20 |
| 6191614 | FPGA configuration circuit including bus-based CRC register | Lawrence C. Hung, F. Erich Goetting | 2001-02-20 |
| 6097210 | Multiplexer array with shifted input traces | Roman Iwanczuk, Steven P. Young | 2000-08-01 |
| 6069489 | FPGA having fast configuration memory data readback | Roman Iwanczuk, Steven P. Young | 2000-05-30 |
| 6034557 | Delay circuit with temperature and voltage stability | Scott O. Frake | 2000-03-07 |
| 6005423 | Low current power-on reset circuit | — | 1999-12-21 |
| 5815404 | Method and apparatus for obtaining and using antifuse testing information to increase programmable device yield | F. Erich Goetting, David B. Squires | 1998-09-29 |
| 5694047 | Method and system for measuring antifuse resistance | F. Erich Goetting, Venu M. Kondapalli | 1997-12-02 |
| 5672966 | High speed post-programming net packing method | Mikael Palczewski, F. Erich Goetting | 1997-09-30 |
| 5617021 | High speed post-programming net verification method | F. Erich Goetting, Wade K. Peterson | 1997-04-01 |
| 5399924 | Low current optional inverter | F. Erich Goetting | 1995-03-21 |