| 6362648 |
Multiplexer for implementing logic functions in a programmable logic device |
Bernard J. New, Steven P. Young, Shekhar Bapat, Kamal Chaudhary, Trevor J. Bauer |
2002-03-26 |
| 6323681 |
Circuits and methods for operating a multiplexer array |
Steven P. Young, David P. Schultz |
2001-11-27 |
| 6205574 |
Method and system for generating a programming bitstream including identification bits |
Eric F. Dellinger |
2001-03-20 |
| 6201406 |
FPGA configurable by two types of bitstreams |
Steven P. Young |
2001-03-13 |
| 6201410 |
Wide logic gate implemented in an FPGA configurable logic element |
Bernard J. New, Steven P. Young, Shekhar Bapat, Kamal Chaudhary, Trevor J. Bauer |
2001-03-13 |
| 6154048 |
Structure and method for loading narrow frames of data from a wide input bus |
Steven P. Young |
2000-11-28 |
| 6137307 |
Structure and method for loading wide frames of data from a narrow input bus |
Steven P. Young |
2000-10-24 |
| 6124731 |
Configurable logic element with ability to evaluate wide logic functions |
Steven P. Young, Shekhar Bapat, Kamal Chaudhary, Trevor J. Bauer |
2000-09-26 |
| 6097210 |
Multiplexer array with shifted input traces |
Steven P. Young, David P. Schultz |
2000-08-01 |
| 6069489 |
FPGA having fast configuration memory data readback |
Steven P. Young, David P. Schultz |
2000-05-30 |
| 6051992 |
Configurable logic element with ability to evaluate five and six input functions |
Steven P. Young, Shekhar Bapat, Kamal Chaudhary, Trevor J. Bauer |
2000-04-18 |
| 5920202 |
Configurable logic element with ability to evaluate five and six input functions |
Steven P. Young, Shekhar Bapat, Kamal Chaudhary, Trevor J. Bauer |
1999-07-06 |