AP

Anh Phan

IN Intel: 15 patents #86 of 4,378Top 2%
Overall (2023): #3,820 of 537,848Top 1%
15
Patents 2023

Issued Patents 2023

Patent #TitleCo-InventorsDate
11830933 Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up oxidation approach Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Patrick Morrow +2 more 2023-11-28
11776898 Sidewall interconnect metallization structures for integrated circuit devices Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Patrick Morrow 2023-10-03
11764263 Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches Ehren Mannebach, Aaron D. Lilak, Willy Rachmady, Gilbert Dewey, Cheng-Ying Huang +3 more 2023-09-19
11764104 Forming an oxide volume within a fin Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more 2023-09-19
11742346 Interconnect techniques for electrically connecting source/drain regions of stacked transistors Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more 2023-08-29
11699637 Vertically stacked transistor devices with isolation wall structures containing an electrical conductor Aaron D. Lilak, Patrick Morrow, Stephanie A. Bojarski 2023-07-11
11676966 Stacked transistors having device strata with different channel widths Gilbert Dewey, Jack T. Kavalieros, Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz +4 more 2023-06-13
11646352 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +2 more 2023-05-09
11640961 III-V source/drain in top NMOS transistors for low temperature stacked transistor contacts Gilbert Dewey, Ravi Pillarisetty, Jack T. Kavalieros, Aaron D. Lilak, Willy Rachmady +6 more 2023-05-02
11616060 Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structure Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rami Hourani, Stephanie A. Bojarski +2 more 2023-03-28
11616056 Vertical diode in stacked transistor architecture Aaron D. Lilak, Patrick Morrow, Cheng-Ying Huang, Rishabh Mehandru, Gilbert Dewey +1 more 2023-03-28
11605565 Three dimensional integrated circuits with stacked transistors Cheng-Ying Huang, Willy Rachmady, Gilbert Dewey, Aaron D. Lilak, Kimin Jun +5 more 2023-03-14
11594533 Stacked trigate transistors with dielectric isolation between first and second semiconductor fins Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Aaron D. Lilak, Patrick Morrow +2 more 2023-02-28
11573798 Stacked transistors with different gate lengths in different device strata Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rishabh Mehandru, Ehren Mannebach +2 more 2023-02-07
11552104 Stacked transistors with dielectric between channels of different device strata Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rishabh Mehandru, Ehren Mannebach +3 more 2023-01-10