Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Stacked trigate transistors with dielectric isolation between first and second semiconductor fins

Stacked trigate transistors with dielectric isolation between first and second semiconductor fins

US Patent 11594533 · Granted Feb 28, 2023

Estimated economic value: $10,430,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Nanowire transistor fabrication with hardmask layers2025
Nanowire transistor fabrication with hardmask layers2025
Double-sided integrated circuit transistor structures with depopulated bottom ch2025
Vertically spaced intra-level interconnect line metallization for integrated cir2025
Integrated circuit structures with backside self-aligned penetrating conductive 2025
Conductive contacts wrapped around epitaxial source or drain regions2025
SRAM with P-type access transistors and complementary field-effect transistor te2025
Gate-all-around integrated circuit structures having germanium-diffused nanoribb2025
Co-deposition of titanium and silicon for improved silicon germanium source and 2025
Transistor gate trench engineering to decrease capacitance and resistance2025
Transistor gate trench engineering to decrease capacitance and resistance2025
Capacitor connections in dielectric layers2025