| 11843054 |
Vertical architecture of thin film transistors |
Van H. Le, Seung Hoon Sung, Benjamin Chu-Kung, Miriam Reshotko, Yih Wang +6 more |
2023-12-12 |
| 11784239 |
Subfin leakage suppression using fixed charge |
Sean T. Ma, Aaron D. Lilak, Justin R. Weber, Harold W. Kennel, Willy Rachmady +5 more |
2023-10-10 |
| 11777029 |
Vertical transistors for ultra-dense logic and memory applications |
Nazila Haratipour, I-Cheng Tung, Abhishek A. Sharma, Arnab Sen Gupta, Van H. Le +2 more |
2023-10-03 |
| 11777013 |
Channel formation for three dimensional transistors |
Abhishek A. Sharma, Willy Rachmady, Van H. Le, Jack T. Kavalieros, Gilbert Dewey |
2023-10-03 |
| 11764275 |
Indium-containing fin of a transistor device with an indium-rich core |
Chandra S. Mohapatra, Glenn A. Glass, Harold W. Kennel, Anand S. Murthy, Willy Rachmady +4 more |
2023-09-19 |
| 11756998 |
Source-channel junction for III-V metal-oxide-semiconductor field effect transistors (MOSFETs) |
Cheng-Ying Huang, Tahir Ghani, Jack T. Kavalieros, Anand S. Murthy, Harold W. Kennel +4 more |
2023-09-12 |
| 11742407 |
Multilayer high-k gate dielectric for a high performance logic transistor |
Seung Hoon Sung, Ashish Verma Penumatcha, Sou-Chi Chang, Devin Merrill, I-Cheng Tung +8 more |
2023-08-29 |
| 11695081 |
Channel layer formation for III-V metal-oxide-semiconductor field effect transistors (MOSFETs) |
Sean T. Ma, Nicholas G. Minutillo, Cheng-Ying Huang, Tahir Ghani, Jack T. Kavalieros +4 more |
2023-07-04 |
| 11676966 |
Stacked transistors having device strata with different channel widths |
Gilbert Dewey, Jack T. Kavalieros, Willy Rachmady, Cheng-Ying Huang, Kimin Jun +4 more |
2023-06-13 |
| 11670682 |
FINFET transistor having a doped sub fin structure to reduce channel to substrate leakage |
Gilbert Dewey, Willy Rachmady, Anand S. Murthy, Chandra S. Mohapatra, Tahir Ghani +2 more |
2023-06-06 |
| 11640984 |
Transistor device with (anti)ferroelectric spacer structures |
Jack T. Kavalieros, Ian A. Young, Uygar E. Avci, Chia-Ching Lin, Owen Loh +5 more |
2023-05-02 |
| 11640961 |
III-V source/drain in top NMOS transistors for low temperature stacked transistor contacts |
Gilbert Dewey, Ravi Pillarisetty, Jack T. Kavalieros, Aaron D. Lilak, Willy Rachmady +6 more |
2023-05-02 |
| 11637185 |
Contact stacks to reduce hydrogen in semiconductor devices |
Justin R. Weber, Harold W. Kennel, Abhishek A. Sharma, Christopher J. Jezewski, Tahir Ghani +4 more |
2023-04-25 |
| 11631737 |
Ingaas epi structure and wet etch process for enabling III-v GAA in art trench |
Sanaz K. Gardner, Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros, Chandra S. Mohapatra +4 more |
2023-04-18 |
| 11616130 |
Transistor device with variously conformal gate dielectric layers |
Seung Hoon Sung, Jack T. Kavalieros, Ian A. Young, Uygar E. Avci, Devin Merrill +3 more |
2023-03-28 |
| 11557658 |
Transistors with high density channel semiconductor over dielectric material |
Gilbert Dewey, Sean T. Ma, Tahir Ghani, Willy Rachmady, Cheng-Ying Huang +3 more |
2023-01-17 |