Issued Patents 2022
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11538749 | Interconnect structure | Shao-Kuan Lee, Hsin-Yen Huang, Cheng-Chin Lee, Kuang-Wei YANG, Ting-Ya Lo +2 more | 2022-12-27 |
| 11532552 | Method and apparatus for forming self-aligned via with selectively deposited etching stop layer | Yung-Hsu Wu, Hai-Ching Chen, Jung-Hsun Tsai, Tien-I Bao | 2022-12-20 |
| 11527435 | Metal capping layer and methods thereof | Shao-Kuan Lee, Cheng-Chin Lee, Hsin-Yen Huang, Hai-Ching Chen | 2022-12-13 |
| 11482447 | Method of forming an integrated chip having a cavity between metal features | Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai +1 more | 2022-10-25 |
| 11482451 | Interconnect structures | Guanyu Luo, Shin-Yi Yang, Ming-Han Lee | 2022-10-25 |
| 11462470 | Method of forming graphene and metallic cap and barrier layers for interconnects | Shin-Yi Yang, Ming-Han Lee | 2022-10-04 |
| 11450602 | Hybrid method for forming semiconductor interconnect structure | Shih-Kang Fu, Ming-Han Lee | 2022-09-20 |
| 11422475 | Multi-metal fill with self-aligned patterning and dielectric with voids | Tai-I Yang, Wei-Chen Chu, Hsiang-Wei Liu, Li-Lin Su, Yung-Hsu Wu | 2022-08-23 |
| 11404366 | Hybrid interconnect structure for self aligned via | Shin-Yi Yang, Ming-Han Lee | 2022-08-02 |
| 11387113 | Method of fabricating semiconductor device with reduced trench distortions | Yung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu +4 more | 2022-07-12 |
| 11361994 | Fully self-aligned interconnect structure | Hsin-Ping Chen, Min Cao | 2022-06-14 |
| 11361989 | Method for manufacturing interconnect structures including air gaps | Cheng-Chin Lee, Shao-Kuan Lee, Hsin-Yen Huang, Hai-Ching Chen | 2022-06-14 |
| 11355390 | Interconnect strucutre with protective etch-stop | Shao-Kuan Lee, Hai-Ching Chen, Hsin-Yen Huang, Cheng-Chin Lee | 2022-06-07 |
| 11355430 | Capping layer overlying dielectric structure to increase reliability | Ting-Ya Lo, Chi-Lin Teng, Hai-Ching Chen, Hsin-Yen Huang, Shao-Kuan Lee +1 more | 2022-06-07 |
| 11335596 | Selective deposition for integrated circuit interconnect structures | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hai-Ching Chen | 2022-05-17 |
| 11322395 | Dielectric capping structure overlying a conductive structure to increase stability | Hsin-Yen Huang, Chi-Lin Teng, Hai-Ching Chen, Shao-Kuan Lee, Cheng-Chin Lee +1 more | 2022-05-03 |
| 11309241 | Protection liner on interconnect wire to enlarge processing window for overlying interconnect via | Shin-Yi Yang, Hsin-Yen Huang, Ming-Han Lee, Yu-Chen Chan, Meng-Pei Lu | 2022-04-19 |
| 11296026 | Semiconductor device and manufacturing method thereof | Ming-Han Lee | 2022-04-05 |
| 11251073 | Selective deposition of barrier layer | Hsin-Yen Huang, Hai-Ching Chen | 2022-02-15 |
| 11227833 | Interconnect structure and method for forming the same | Shao-Kuan Lee, Cheng-Chin Lee, Hsin-Yen Huang, Hai-Ching Chen | 2022-01-18 |
| 11222843 | Interconnect structure and method for forming the same | Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hai-Ching Chen | 2022-01-11 |