Issued Patents 2022
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11521896 | Selective deposition of a protective layer to reduce interconnect structure critical dimensions | Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai, Wei-Hao Liao | 2022-12-06 |
| 11488926 | Self-aligned interconnect structure | Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Yu-Teng Dai, Wei-Hao Liao | 2022-11-01 |
| 11482447 | Method of forming an integrated chip having a cavity between metal features | Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Shau-Lin Shue, Yu-Teng Dai +1 more | 2022-10-25 |
| 11362030 | Sidewall spacer structure enclosing conductive wire sidewalls to increase reliability | Yu-Teng Dai, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Wei-Hao Liao | 2022-06-14 |
| 11355701 | Integrated circuit | Wei-Hao Liao, Chih Wei Lu, Pin-Ren Dai, Chung-Ju Lee | 2022-06-07 |
| 11329216 | Magnetic tunnel junction devices | Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee | 2022-05-10 |
| 11302641 | Self-aligned cavity strucutre | Wei-Hao Liao, Chung-Ju Lee, Chih Wei Lu, Yu-Teng Dai | 2022-04-12 |