Issued Patents 2022
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11521896 | Selective deposition of a protective layer to reduce interconnect structure critical dimensions | Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Yu-Teng Dai, Wei-Hao Liao | 2022-12-06 |
| 11488926 | Self-aligned interconnect structure | Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Yu-Teng Dai, Wei-Hao Liao | 2022-11-01 |
| 11482447 | Method of forming an integrated chip having a cavity between metal features | Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Shau-Lin Shue, Yu-Teng Dai +1 more | 2022-10-25 |
| 11362030 | Sidewall spacer structure enclosing conductive wire sidewalls to increase reliability | Yu-Teng Dai, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao | 2022-06-14 |