Issued Patents 2022
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532719 | Transistors on heterogeneous bonding layers | Kimin Jun, Jack T. Kavalieros, Gilbert Dewey, Willy Rachmady, Aaron D. Lilak +5 more | 2022-12-20 |
| 11522072 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2022-12-06 |
| 11515318 | 3D floating-gate multiple-input device | Aaron D. Lilak, Sayed Hasan | 2022-11-29 |
| 11482621 | Vertically stacked CMOS with upfront M0 interconnect | Willy Rachmady, Aaron D. Lilak, Rishabh Mehandru, Cheng-Ying Huang, Gilbert Dewey +4 more | 2022-10-25 |
| 11462568 | Stacked thin film transistors | Aaron D. Lilak, Justin R. Weber, Harold W. Kennel, Willy Rachmady, Gilbert Dewey +3 more | 2022-10-04 |
| 11444166 | Backside source/drain replacement for semiconductor devices with metallization on both sides | Glenn A. Glass, Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Mauro J. Kobrinsky | 2022-09-13 |
| 11437405 | Transistors stacked on front-end p-type transistors | Gilbert Dewey, Aaron D. Lilak, Willy Rachmady, Anh Phan, Ehren Mannebach +4 more | 2022-09-06 |
| 11437283 | Backside contacts for semiconductor devices | Aaron D. Lilak, Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski +4 more | 2022-09-06 |
| 11430814 | Metallization structures for stacked device connectivity and their methods of fabrication | Aaron D. Lilak, Anh Phan, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more | 2022-08-30 |
| 11424160 | Self-aligned local interconnects | Aaron D. Lilak, Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski +5 more | 2022-08-23 |
| 11404319 | Vertically stacked finFETs and shared gate patterning | Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea +1 more | 2022-08-02 |
| 11398479 | Heterogeneous Ge/III-V CMOS transistor structures | Willy Rachmady, Abhishek A. Sharma, Ravi Pillarisetty, Rishabh Mehandru, Aaron D. Lilak +2 more | 2022-07-26 |
| 11393777 | Microelectronic assemblies | Adel A. Elsherbini, Henning Braunisch, Kimin Jun, Brennen Mueller, Shawna M. Liff +2 more | 2022-07-19 |
| 11393818 | Stacked transistors with Si PMOS and high mobility thin film transistor NMOS | Gilbert Dewey, Ravi Pillarisetty, Abhishek A. Sharma, Aaron D. Lilak, Willy Rachmady +5 more | 2022-07-19 |
| 11387238 | Non-silicon N-Type and P-Type stacked transistors for integrated circuit devices | Gilbert Dewey, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang, Willy Rachmady +1 more | 2022-07-12 |
| 11380684 | Stacked transistor architecture including nanowire or nanoribbon thin film transistors | Gilbert Dewey, Aaron D. Lilak, Cheng-Ying Huang, Jack T. Kavalieros, Willy Rachmady +4 more | 2022-07-05 |
| 11374004 | Pedestal fin structure for stacked transistor integration | Aaron D. Lilak, Rishabh Mehandru, Anh Phan, Gilbert Dewey, Willy Rachmady +5 more | 2022-06-28 |
| 11348897 | Microelectronic assemblies | Adel A. Elsherbini, Henning Braunisch, Aleksandar Aleksov, Shawna M. Liff, Johanna M. Swan +3 more | 2022-05-31 |
| 11342227 | Stacked transistor structures with asymmetrical terminal interconnects | Aaron D. Lilak, Ehren Mannebach, Nafees Kabir, Gilbert Dewey, Willy Rachmady +1 more | 2022-05-24 |
| 11328951 | Transistor cells including a deep via lined wit h a dielectric material | Mauro J. Kobrinsky, Rishabh Mehandru | 2022-05-10 |
| 11264493 | Wrap-around source/drain method of making contacts for backside metals | Kimin Jun, Il-Seok Son, Donald W. Nelson | 2022-03-01 |
| 11264405 | Semiconductor diodes employing back-side semiconductor or metal | Rishabh Mehandru, Nathan Jack | 2022-03-01 |
| 11257738 | Vertically stacked transistor devices with isolation wall structures containing an electrical conductor | Aaron D. Lilak, Anh Phan, Stephanie A. Bojarski | 2022-02-22 |
| 11257929 | Stacked transistors | Rishabh Mehandru, Aaron D. Lilak | 2022-02-22 |
| 11251156 | Fabrication and use of through silicon vias on double sided interconnect device | Brennen Mueller, Kimin Jun, Paul B. Fischer, Daniel Pantuso | 2022-02-15 |