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Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices |
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Memory cell with a ferroelectric capacitor integrated with a transtor gate |
Daniel H. Morris, Uygar E. Avci, Ian A. Young |
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Multi-height finfet device by selective oxidation |
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Integration method for finfet with tightly controlled multiple fin heights |
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| 11322504 |
Ferroelectric-capacitor integration using novel multi-metal-level interconnect with replaced dielectric for ultra-dense embedded SRAM in state-of-the-art CMOS technology |
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| 11302777 |
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Multilayer insulator stack for ferroelectric transistor and capacitor |
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