Issued Patents 2016
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9330947 | Methods for forming package-on-package structures having buffer dams | Shou-Cheng Hu, Ching-Wen Hsiao | 2016-05-03 |
| 9318458 | Bump structure having a side recess and semiconductor structure including the same | Chih-Horng Chang, Tin-Hao Kuo, Yen-Liang Lin | 2016-04-19 |
| 9312230 | Conductive pillar structure for semiconductor substrate and method of manufacture | Chih-Hua Chen, Chen-Cheng Kuo | 2016-04-12 |
| 9312225 | Bump structure for stacked dies | Hung-Pin Chang, Kuo-Ching Hsu, Wen-Chih Chiou, Chen-Hua Yu | 2016-04-12 |
| 9299674 | Bump-on-trace interconnect | Chen-Hua Yu | 2016-03-29 |
| 9293449 | Methods and apparatus for package on package devices with reversed stud bump through via interconnections | Shou-Cheng Hu, Tin-Hao Kuo, Chih-Hua Chen, Ching-Wen Hsiao | 2016-03-22 |
| 9287234 | Dummy flip chip bumps for reducing stress | Sheng-Yu Wu, Tin-Hao Kuo, Chita Chuang | 2016-03-15 |
| 9287191 | Semiconductor device package and method | Hao-Juin Liu, Chita Chuang, Chen-Cheng Kuo | 2016-03-15 |
| 9269688 | Bump-on-trace design for enlarge bump-to-trace distance | Sheng-Yu Wu, Tin-Hao Kuo | 2016-02-23 |
| 9263377 | POP structures with dams encircling air gaps and methods for forming the same | Chen-Hua Yu, Tsung-Ding Wang, Chung-Shi Liu, Jiun Yi Wu | 2016-02-16 |
| 9257332 | Through-assembly via modules and methods for forming the same | Chih-Hua Chen, Ching-Wen Hsiao | 2016-02-09 |
| 9258922 | PoP structures including through-assembly via modules | Chih-Hua Chen, Ching-Wen Hsiao | 2016-02-09 |
| 9257412 | Stress reduction apparatus | Yao-Chun Chuang, Yu-Chen Hsu, Hao-Juin Liu, Chita Chuang, Chen-Cheng Kuo | 2016-02-09 |
| 9257385 | Landing areas of bonding structures | Chih-Horng Chang, Tin-Hao Kuo | 2016-02-09 |
| 9232632 | Methods and apparatuses for detecting registration offsets | Xinhong Su | 2016-01-05 |