Issued Patents All Time
Showing 26–50 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11063117 | Semiconductor device structure having carrier-trapping layers with different grain sizes | Yong-En Syu, Kuo-Hwa Tzeng, Ke-Dian Wu, Cheng-Ta Wu, Yeur-Luen Tu +2 more | 2021-07-13 |
| 11049797 | Method for manufacturing a semiconductor structure comprising a semiconductor device layer formed on a tem, porary substrate having a graded SiGe etch stop layer therebetween | Shih Pei Chou, Yeur-Luen Tu, Alexander Kalnitsky, Tung-I Lin, Wei-Li Chen | 2021-06-29 |
| 10971406 | Method of forming source/drain regions of transistors | Ching-Wei Tsai, Yeur-Luen Tu, Tung-I Lin, Wei-Li Chen | 2021-04-06 |
| 10971534 | Image sensor having improved full well capacity and related method of formation | Shyh-Fann Ting, Yen-Ting Chiang, Yeur-Luen Tu, Min-Ying Tsai | 2021-04-06 |
| 10957540 | Semiconductor epitaxy bordering isolation structure | Wen-Chin Chen, Cheng-Yi Wu, Ren-Hua Guo, Hsiang-Wei Liu, Chin-Szu Lee | 2021-03-23 |
| 10923503 | Semiconductor-on-insulator (SOI) substrate comprising a trap-rich layer with small grain sizes | Cheng-Ta Wu, Yeur-Luen Tu, Min-Ying Tsai, Alex Usenko | 2021-02-16 |
| 10889097 | Wafer debonding system and method | Chang-Chen Tsao, Kuo-Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yeur-Luen Tu +1 more | 2021-01-12 |
| 10868156 | Method of forming epitaxial silicon layer and semiconductor device thereof | Po-Jung Chiang, Yen-Hsiu Chen, Yeur-Luen Tu | 2020-12-15 |
| 10756222 | Backside illuminated photo-sensitive device with gradated buffer layer | Chia-Shiung Tsai, Cheng-Ta Wu, Xiaomeng Chen, Yen-Chang Chu, Yeur-Luen Tu | 2020-08-25 |
| 10658410 | Image sensor having improved full well capacity and related method of formation | Shyh-Fann Ting, Yen-Ting Chiang, Yeur-Luen Tu, Min-Ying Tsai | 2020-05-19 |
| 10658474 | Method for forming thin semiconductor-on-insulator (SOI) substrates | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Shih Pei Chou +1 more | 2020-05-19 |
| 10569520 | Wafer debonding system and method | Chang-Chen Tsao, Kuo-Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yeur-Luen Tu +1 more | 2020-02-25 |
| 10553474 | Method for forming a semiconductor-on-insulator (SOI) substrate | Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Shih Pei Chou +1 more | 2020-02-04 |
| 10522353 | Semiconductor epitaxy bordering isolation structure | Wen-Chin Chen, Cheng-Yi Wu, Ren-Hua Guo, Hsiang-Wei Liu, Chin-Szu Lee | 2019-12-31 |
| 10516040 | Method of forming epitaxial silicon layer and semiconductor device thereof | Po-Jung Chiang, Yen-Hsiu Chen, Yeur-Luen Tu | 2019-12-24 |
| 10453757 | Transistor channel | Ching-Wei Tsai, Yeur-Luen Tu, Tung-I Lin, Wei-Li Chen | 2019-10-22 |
| 10395974 | Method for forming a thin semiconductor-on-insulator (SOI) substrate | Shih Pei Chou, Hung-Wen Hsu, Jiech-Fun Lu, Yung-Lung Lin, Min-Ying Tsai | 2019-08-27 |
| 10304723 | Process to form SOI substrate | Cheng-Ta Wu, Ming-Che Yang, Wei-Kung Tsai, Yong-En Syu, Yeur-Luen Tu +1 more | 2019-05-28 |
| 10269864 | Pixel isolation device and fabrication method | Tung-I Lin, Wei-Li Chen, Yeur-Luen Tu | 2019-04-23 |
| 10155369 | Wafer debonding system and method | Chang-Chen Tsao, Kuo-Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yeur-Luen Tu +1 more | 2018-12-18 |
| 10147609 | Semiconductor epitaxy bordering isolation structure | Wen-Chin Chen, Cheng-Yi Wu, Ren-Hua Guo, Hsiang-Wei Liu, Chin-Szu Lee | 2018-12-04 |
| 10147756 | Deep trench isolation structure and method of forming same | Yeur-Luen Tu, Tung-I Lin, Cheng-Lung Wu, Wei-Li Chen | 2018-12-04 |
| 10109756 | Backside illuminated photo-sensitive device with gradated buffer layer | Chia-Shiung Tsai, Cheng-Ta Wu, Xiaomeng Chen, Yen-Chang Chu, Yeur-Luen Tu | 2018-10-23 |
| 9978650 | Transistor channel | Ching-Wei Tsai, Yeur-Luen Tu, Tung-I Lin, Wei-Li Chen | 2018-05-22 |
| 9905600 | Image sensor device and manufacturing method thereof | Yeur-Luen Tu, Tung-I Lin, Cheng-Lung Wu | 2018-02-27 |