Issued Patents All Time
Showing 51–75 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9899441 | Deep trench isolation (DTI) structure with a tri-layer passivation layer | Cheng-Lung Wu, Tung-I Lin, Yeur-Luen Tu | 2018-02-20 |
| 9887235 | Pixel isolation device and fabrication method | Tung-I Lin, Wei-Li Chen, Yeur-Luen Tu | 2018-02-06 |
| 9799702 | Deep trench isolation structure and method of forming same | Yeur-Luen Tu, Tung-I Lin, Cheng-Lung Wu, Wei-Li Chen | 2017-10-24 |
| 9728641 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai +2 more | 2017-08-08 |
| 9679980 | Common source oxide formation by in-situ steam oxidation for embedded flash | Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, I-Ting Li +1 more | 2017-06-13 |
| 9653574 | Selective etching in the formation of epitaxy regions in MOS devices | Chii-Horng Li, Tze-Liang Lee | 2017-05-16 |
| 9634096 | Semiconductor device with trench isolation | Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin +1 more | 2017-04-25 |
| 9595589 | Transistor with performance boost by epitaxial layer | Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin +1 more | 2017-03-14 |
| 9425287 | Reducing variation by using combination epitaxy growth | Yi-Hung Lin, Tze-Liang Lee, Chii-Horng Li | 2016-08-23 |
| 9412868 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai +2 more | 2016-08-09 |
| 9349768 | CMOS image sensor with epitaxial passivation layer | Tung-Hsiung Tseng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee +4 more | 2016-05-24 |
| 9263339 | Selective etching in the formation of epitaxy regions in MOS devices | Chii-Horng Li, Tze-Liang Lee | 2016-02-16 |
| 9245974 | Performance boost by silicon epitaxy | Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin +1 more | 2016-01-26 |
| 9153717 | Backside illuminated photo-sensitive device with gradated buffer layer | Yen-Chang Chu, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen | 2015-10-06 |
| 9142643 | Method for forming epitaxial feature | Tsz-Mei Kwok, Chun Hsiung Tsai, Jeff J. Xu | 2015-09-22 |
| 9099324 | Semiconductor device with trench isolation | Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin +1 more | 2015-08-04 |
| 9064688 | Performing enhanced cleaning in the formation of MOS devices | Wu-Ping Huang, Chii-Horng Li, Tze-Liang Lee | 2015-06-23 |
| 8946060 | Methods of manufacturing strained semiconductor devices with facets | Chii-Horng Li, Tze-Liang Lee | 2015-02-03 |
| 8835267 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai +2 more | 2014-09-16 |
| 8828850 | Reducing variation by using combination epitaxy growth | Chii-Horng Li, Tze-Liang Lee, Yi-Hung Lin | 2014-09-09 |
| 8530316 | Method for fabricating a semiconductor device | Jhi-Cherng Lu, Ming-Hua Yu, Chii-Horng Li, Tze-Liang Lee | 2013-09-10 |
| 8455930 | Strained semiconductor device with facets | Chii-Horng Li, Tze-Liang Lee | 2013-06-04 |
| 8446126 | Power bank apparatus with speaker | — | 2013-05-21 |
| 8377784 | Method for fabricating a semiconductor device | Jhi-Cherng Lu, Ming-Hua Yu, Chii-Horng Li, Tze-Liang Lee | 2013-02-19 |
| 5553795 | Inertial impactor with a specially designed impaction plate | Chuen-Jinn Tsai | 1996-09-10 |