Issued Patents All Time
Showing 51–75 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11410982 | Semiconductor devices and methods of manufacturing | Chang-Yi Yang, Shin-Puu Jeng | 2022-08-09 |
| 11380666 | Fan-out package with cavity substrate | Po-Hao Tsai, Techi Wong, Shin-Puu Jeng, Meng-Wei Chou, Meng-Liang Lin | 2022-07-05 |
| 11362010 | Structure and formation method of chip package with fan-out feature | Meng-Liang Lin, Po-Hao Tsai, Yi-Wen Wu, Techi Wong, Shin-Puu Jeng | 2022-06-14 |
| 11322447 | Dual-sided routing in 3D SiP structure | Po-Hao Tsai, Meng-Liang Lin, Yi-Wen Wu, Shin-Puu Jeng, Techi Wong | 2022-05-03 |
| 11322449 | Package with fan-out structures | Shin-Puu Jeng, Po-Hao Tsai, Techi Wong | 2022-05-03 |
| 11302650 | Package structure and method of fabricating the same | Yi-Wen Wu, Shin-Puu Jeng, Shih-Ting Hung | 2022-04-12 |
| 11296065 | Semiconductor packages and methods of forming same | Shin-Puu Jeng, Techi Wong, Shuo-Mao Chen, Meng-Wei Chou | 2022-04-05 |
| 11270975 | Semiconductor packages including passive devices and methods of forming same | Shin-Puu Jeng, Shuo-Mao Chen | 2022-03-08 |
| 11270953 | Structure and formation method of chip package with shielding structure | Po-Hao Tsai, Shin-Puu Jeng, Shuo-Mao Chen, Ming-Chih Yew | 2022-03-08 |
| 11239173 | Structure and formation method of chip package with fan-out feature | Po-Hao Tsai, Meng-Liang Lin, Techi Wong, Shin-Puu Jeng | 2022-02-01 |
| 11164754 | Fan-out packages and methods of forming the same | Po-Hao Tsai, Ming-Chih Yew, Chia-Kuei Hsu, Shin-Puu Jeng, Meng-Liang Lin +2 more | 2021-11-02 |
| 11101214 | Package structure with dam structure and method for forming the same | Po-Hao Tsai, Techi Wong, Meng-Liang Lin, Yi-Wen Wu, Shin-Puu Jeng | 2021-08-24 |
| 11094625 | Semiconductor package with improved interposer structure | Yi-Wen Wu, Techi Wong, Po-Hao Tsai, Shih-Ting Hung, Shin-Puu Jeng | 2021-08-17 |
| 11075151 | Fan-out package with controllable standoff | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Shin-Puu Jeng | 2021-07-27 |
| 11075132 | Integrated fan-out package, package-on-package structure, and manufacturing method thereof | Shin-Puu Jeng, Hsien-Wen Liu, Shih-Ting Hung, Yi-Jou Lin, Tzu-Jui Fang | 2021-07-27 |
| 11063007 | Semiconductor device and method of manufacture | Po-Hao Tsai, Shin-Puu Jeng | 2021-07-13 |
| 11062997 | Method for forming chip package structure | Shin-Puu Jeng, Techi Wong, Po-Yao Lin, Ming-Chih Yew, Po-Hao Tsai | 2021-07-13 |
| 11018081 | Heterogeneous fan-out structure and method of manufacture | Po-Hao Tsai, Shin-Puu Jeng, Techi Wong | 2021-05-25 |
| 10985100 | Chip package with recessed interposer substrate | Shin-Puu Jeng, Po-Hao Tsai, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong | 2021-04-20 |
| 10971461 | Semiconductor device and method of manufacture | Po-Hao Tsai, Ming-Chih Yew, Shin-Puu Jeng | 2021-04-06 |
| 10879162 | Integrated fan-out packages | Shin-Puu Jeng, Dai-Jang Chen, Hsiang-Tai Lu, Hsien-Wen Liu, Chih-Hsien Lin +1 more | 2020-12-29 |
| 10867924 | Semiconductor package with redistribution structure and pre-made substrate on opposing sides for dual-side metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Hsien-Wen Liu, Feng-Cheng Hsu, Po-Yao Lin | 2020-12-15 |
| 10804254 | Fan-out package with cavity substrate | Po-Hao Tsai, Techi Wong, Shin-Puu Jeng, Meng-Wei Chou, Meng-Liang Lin | 2020-10-13 |
| 10790162 | Integrated circuit package and method | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Shin-Puu Jeng | 2020-09-29 |
| 10515827 | Method for forming chip package with recessed interposer substrate | Shin-Puu Jeng, Po-Hao Tsai, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong | 2019-12-24 |