Issued Patents All Time
Showing 26–50 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996372 | Semiconductor device and method of manufacture | Po-Hao Tsai, Shin-Puu Jeng | 2024-05-28 |
| 11996606 | Heterogeneous antenna in fan-out package | Po-Hao Tsai, Shin-Puu Jeng | 2024-05-28 |
| 11948892 | Formation method of chip package with fan-out feature | Po-Hao Tsai, Meng-Liang Lin, Techi Wong, Shin-Puu Jeng | 2024-04-02 |
| 11908764 | Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity | Meng-Liang Lin, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng | 2024-02-20 |
| 11901307 | Semiconductor device including electromagnetic interference (EMI) shielding and method of manufacture | Meng-Wei Chou, Shin-Puu Jeng | 2024-02-13 |
| 11901279 | Semiconductor package and method of manufacturing the same | Shih-Ting Hung, Meng-Liang Lin, Shin-Puu Jeng, Yi-Wen Wu | 2024-02-13 |
| 11901277 | Semiconductor package and method of manufacturing the same | Shih-Ting Hung, Meng-Liang Lin, Shin-Puu Jeng, Yi-Wen Wu | 2024-02-13 |
| 11854955 | Fan-out package with controllable standoff | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Shin-Puu Jeng | 2023-12-26 |
| 11855059 | Fan-out package with cavity substrate | Po-Hao Tsai, Techi Wong, Shin-Puu Jeng, Meng-Wei Chou, Meng-Liang Lin | 2023-12-26 |
| 11848265 | Semiconductor package with improved interposer structure | Yi-Wen Wu, Techi Wong, Po-Hao Tsai, Shih-Ting Hung, Shin-Puu Jeng | 2023-12-19 |
| 11848305 | Semiconductor packages including passive devices and methods of forming same | Shin-Puu Jeng, Shuo-Mao Chen | 2023-12-19 |
| 11824007 | Dual-sided routing in 3D SiP structure | Po-Hao Tsai, Meng-Liang Lin, Yi-Wen Wu, Shin-Puu Jeng, Techi Wong | 2023-11-21 |
| 11804451 | Package structure and method of fabricating the same | Yi-Wen Wu, Shin-Puu Jeng, Shih-Ting Hung | 2023-10-31 |
| 11764159 | Package with fan-out structures | Shin-Puu Jeng, Po-Hao Tsai, Techi Wong | 2023-09-19 |
| 11682599 | Chip package structure with molding layer and method for forming the same | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Shin-Puu Jeng | 2023-06-20 |
| 11670577 | Chip package with redistribution structure having multiple chips | Shin-Puu Jeng, Po-Hao Tsai, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong | 2023-06-06 |
| 11646256 | Heterogeneous fan-out structure and method of manufacture | Po-Hao Tsai, Shin-Puu Jeng, Techi Wong | 2023-05-09 |
| 11637054 | Semiconductor package and method of manufacturing the same | Shih-Ting Hung, Meng-Liang Lin, Shin-Puu Jeng, Yi-Wen Wu | 2023-04-25 |
| 11610854 | Semiconductor device and method of manufacture | Po-Hao Tsai, Ming-Chih Yew, Shin-Puu Jeng | 2023-03-21 |
| 11600575 | Method for forming chip package structure | Shin-Puu Jeng, Techi Wong, Po-Yao Lin, Ming-Chih Yew, Po-Hao Tsai | 2023-03-07 |
| 11600573 | Structure and formation method of chip package with conductive support elements to reduce warpage | Po-Hao Tsai, Techi Wong, Yi-Wen Wu, Shin-Puu Jeng | 2023-03-07 |
| 11532867 | Heterogeneous antenna in fan-out package | Po-Hao Tsai, Shin-Puu Jeng | 2022-12-20 |
| 11527474 | Integrated circuit package and method | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Shin-Puu Jeng | 2022-12-13 |
| 11456257 | Semiconductor package with dual sides of metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Hsien-Wen Liu, Feng-Cheng Hsu, Po-Yao Lin | 2022-09-27 |
| 11430776 | Semiconductor devices and methods of manufacturing | Yi-Wen Wu, Meng-Liang Lin, Techi Wong, Shih-Ting Hung, Po-Hao Tsai +1 more | 2022-08-30 |