Issued Patents All Time
Showing 76–100 of 111 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9281193 | Patterning method for semiconductor device fabrication | Yen-Chun Huang, Chih-Ming Lai, Ming-Feng Shieh | 2016-03-08 |
| 9262577 | Layout method and system for multi-patterning integrated circuits | Huang-Yu Chen, Tsong-Hua Ou, Chin-Hsiung Hsu | 2016-02-16 |
| 9213790 | Conflict detection for self-aligned multiple patterning compliance | Chin-Chang Hsu, HungLung Lin, Ying-Yu Shen, Wen-Ju Yang | 2015-12-15 |
| 9176373 | System and method for decomposition of a single photoresist mask pattern into 3 photoresist mask patterns | Wen-Li Cheng, Ming-Hui Chih, Chia-Ping Chiang, Tsong-Hua Ou, Wen-Chun Huang +1 more | 2015-11-03 |
| 9172195 | Coaxial cable end connector | Li-Sen Chen, Yen-Jang Liao | 2015-10-27 |
| 9153478 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Shih-Ming Chang, Ming-Feng Shieh, Chih-Ming Lai, Tsai-Sheng Gau +6 more | 2015-10-06 |
| 9076736 | Patterning method for semiconductor device fabrication | Yen-Chun Huang, Ming-Feng Shieh, Chih-Ming Lai | 2015-07-07 |
| 9069249 | Self aligned patterning with multiple resist layers | Ming-Feng Shieh, Shih-Ming Chang, Chih-Ming Lai, Ru-Gun Liu | 2015-06-30 |
| 9053279 | Pattern modification with a preferred position function | Shih-Ming Chang | 2015-06-09 |
| 9054159 | Method of patterning a feature of a semiconductor device | Yen-Chun Huang, Ming-Feng Shieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau | 2015-06-09 |
| 9040433 | Photo resist trimmed line end space | Chia-Ying Lee, Jyu-Horng Shieh, Ming-Feng Shieh, Shih-Ming Chang, Chih-Ming Lai +1 more | 2015-05-26 |
| 9029230 | Conductive line routing for multi-patterning technology | You-Cheng Xiao, Wei Min Chan | 2015-05-12 |
| 9026971 | Multi-patterning conflict free integrated circuit design | Chien Lin Ho, Chin-Chang Hsu, Hung-Lung Lin, Wen-Ju Yang, Yi-Kan Cheng +5 more | 2015-05-05 |
| 9003336 | Mask assignment optimization | Wen-Chun Huang, Ming-Hui Chih, Chih-Ming Lai, Ru-Gun Liu, Ko-Bin Kao +4 more | 2015-04-07 |
| 8962464 | Self-alignment for using two or more layers and methods of forming same | Shih-Ming Chang, Ru-Gun Liu, Ming-Feng Shieh, Chih-Ming Lai, Tsai-Sheng Gau | 2015-02-24 |
| 8943445 | Method of merging color sets of layout | Pi-Tsung Chen, Ming-Hui Chih, Wei-Long Wang, Wen-Chun Huang, Ru-Gun Liu +4 more | 2015-01-27 |
| 8907497 | Semiconductor device with self-aligned interconnects and blocking portions | Shih-Ming Chang, Tsong-Hua Ou, Ru-Gun Liu, Fang-Yu Fan, Yuan-Te Hou | 2014-12-09 |
| 8898600 | Layout optimization for integrated design | Huang-Yu Chen, Yuan-Te Hou, Yu-Hsiang Kao, Ru-Gun Liu, Lee-Chung Lu | 2014-11-25 |
| 8850367 | Method of decomposable checking approach for mask alignment in multiple patterning | Chih-Ming Lai, Wen-Chun Huang, Ru-Gun Liu | 2014-09-30 |
| 8850366 | Method for making a mask by forming a phase bar in an integrated circuit design layout | Ru-Gun Liu, Shuo-Yen Chou, Hoi-Tou Ng, Yi-Yin Chen | 2014-09-30 |
| 8828885 | Photo resist trimmed line end space | Chia-Ying Lee, Jyu-Horng Shieh, Ming-Feng Shieh, Shih-Ming Chang, Chih-Ming Lai +1 more | 2014-09-09 |
| 8799834 | Self-aligned multiple patterning layout design | Huang-Yu Chen, Li-Chun Tien, Jhih-Jian Wang, Chin-Chang Hsu, Chin-Hsiung Hsu +3 more | 2014-08-05 |
| 8779592 | Via-free interconnect structure with self-aligned metal line interconnections | Yu-Po Tang, Shih-Ming Chang, Ru-Gun Liu | 2014-07-15 |
| 8782575 | Conflict detection for self-aligned multiple patterning compliance | Chin-Chang Hsu, HungLung Lin, Ying-Yu Shen, Wen-Ju Yang | 2014-07-15 |
| 8745556 | Layout method and system for multi-patterning integrated circuits | Huang-Yu Chen, Tsong-Hua Ou, Chin-Hsiung Hsu | 2014-06-03 |