Issued Patents All Time
Showing 1–25 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12265774 | Boundary cell | Yu-Jung Chang, Min-Yuan Tsai | 2025-04-01 |
| 12236180 | Integrated circuit and method of manufacturing the same | Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2025-02-25 |
| 12223251 | Standard cell and semiconductor device including anchor nodes | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2025-02-11 |
| 12165969 | Integrated circuit device and method | Yu-Jung Chang, Nien-Yu Tsai, Min-Yuan Tsai | 2024-12-10 |
| 11914941 | Integrated circuit layout validation using machine learning | Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen | 2024-02-27 |
| 11775724 | Integrated circuit and method of manufacturing the same | Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2023-10-03 |
| 11714946 | Standard cell and semiconductor device including anchor nodes and method of making | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2023-08-01 |
| 11709986 | Boundary cell | Yu-Jung Chang, Min-Yuan Tsai | 2023-07-25 |
| 11681850 | Multi-patterning graph reduction and checking flow method | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2023-06-20 |
| 11138361 | Integrated circuit and system of manufacturing the same | Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2021-10-05 |
| 11106852 | Standard cell and semiconductor device including anchor nodes and method of making | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2021-08-31 |
| 11062075 | Integrated circuit and method for manufacturing same | Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2021-07-13 |
| 11062074 | Boundary cell | Yu-Jung Chang, Min-Yuan Tsai | 2021-07-13 |
| 11017148 | Multi-patterning graph reduction and checking flow method | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2021-05-25 |
| 11010529 | Integrated circuit layout validation using machine learning | Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen | 2021-05-18 |
| 10878167 | Method of determining colorability of a semiconductor device and system for implementing the same | Chung-Yun Cheng, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Jian-Yi Li, Li Ke | 2020-12-29 |
| 10877370 | Stretchable layout design for EUV defect mitigation | Hsing-Lin Yang, Chin-Chang Hsu, Yen-Hung Lin, Chung-Hsing Wang | 2020-12-29 |
| 10713407 | Standard cell and semiconductor device including anchor nodes | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2020-07-14 |
| 10515185 | Method of determining colorability of a semiconductor device and system for implementing the same | Chung-Yun Cheng, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Jian-Yi Li, Li Ke | 2019-12-24 |
| 10489548 | Integrated circuit and method for manufacturing the same | Yu-Jung Chang, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2019-11-26 |
| 10430544 | Multi-patterning graph reduction and checking flow method | Nien-Yu Tsai, Chin-Chang Hsu, Hsien-Hsin Sean Lee | 2019-10-01 |
| 10397457 | Camera module | Yiu Sing Ho, Jing Shi | 2019-08-27 |
| 10389923 | Camera module | Yiu Sing Ho, Fen Yan Li | 2019-08-20 |
| 10205371 | Voice coil motor | Sidney Chou, Yiu Sing Ho, Kam Fung Yip, Hai Yang Wu, Shou Sheng Gao +2 more | 2019-02-12 |
| 10204205 | Method of determining colorability of a semiconductor device and system for implementing the same | Chung-Yun Cheng, Chin-Chang Hsu, Hsien-Hsin Sean Lee, Jian-Yi Li, Li Ke | 2019-02-12 |