Issued Patents All Time
Showing 51–60 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8751978 | Balancing mask loading | HungLung Lin, Chin-Chang Hsu, C. R. Hsu | 2014-06-10 |
| 8726200 | Recognition of template patterns with mask information | Chung-Min Fu, Yung-Fong Lu, Chin-Chang Hsu | 2014-05-13 |
| 8645877 | Multi-patterning method | Chin-Chang Hsu, Ying-Yu Shen, Hsiao-Shu Chao, Yi-Kan Cheng | 2014-02-04 |
| 8631379 | Decomposing integrated circuit layout | Pi-Tsung Chen, Ming-Hui Chih, Ken-Hsien Hsieh, Wei-Long Wang, Wen-Chun Huang +4 more | 2014-01-14 |
| 8473873 | Multi-patterning method | Chin-Chang Hsu, Ying-Yu Shen, Hsiao-Shu Chao, Yi-Kan Cheng | 2013-06-25 |
| 8468470 | Multi-patterning method | Chin-Chang Hsu, Hsiao-Shu Chao, Yi-Kan Cheng | 2013-06-18 |
| 8448100 | Tool and method for eliminating multi-patterning conflicts | Hung-Lung Lin, Chin-Chang Hsu, Ying-Yu Shen, Hsiao-Shu Chao, Yi-Kan Cheng +5 more | 2013-05-21 |
| 8434043 | Methodology for analysis and fixing guidance of pre-coloring layout | Chin-Chang Hsu, HungLung Lin, Hsiao-Shu Chao, Yi-Kan Cheng | 2013-04-30 |
| 8239806 | Routing system and method for double patterning technology | Huang-Yu Chen, Yuan-Te Hou, Gwan Sin Chang, Zhe-Wei Jiang, Yi-Kan Cheng +1 more | 2012-08-07 |
| 8160830 | Method of yield management for semiconductor manufacture and apparatus thereof | I-Yun Leu, Jen-Kuei Wu, Yun Shen, Huan-Yung Chang | 2012-04-17 |