Issued Patents All Time
Showing 51–75 of 136 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11579648 | Voltage regulator with power rail tracking | Haruki Mori, Zhi-Hao Chang, Yangsyu Lin, Yu-Hao Hsu, Yen-Huei Chen +2 more | 2023-02-14 |
| 11569246 | Four CPP wide memory cell with buried power grid, and method of fabricating same | Chih-Yu Lin, Yen-Huei Chen, Wei Zhao, Yi-Hsin Nien | 2023-01-31 |
| 11562786 | Memory device having a negative voltage circuit | Yi-Hsin Nien, Chih-Yu Lin, Yen-Huei Chen | 2023-01-24 |
| 11562946 | Memory macro including through-silicon via | Tze-Chiang Huang, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang +2 more | 2023-01-24 |
| 11532351 | Memory device with additional write bit lines | Chia-En Huang, Yen-Huei Chen, Jui-Che Tsai, Yih Wang | 2022-12-20 |
| 11482276 | System and method for read speed improvement in 3T DRAM | Yi-Hsun Chiu, Yih Wang | 2022-10-25 |
| 11423974 | Method of forming semiconductor device including distributed write driving arrangement | Hung-Jen Liao, Li-Wen Wang, Jonathan Tsung-Yung Chang, Yen-Huei Chen | 2022-08-23 |
| 11423977 | Static random access memory with write assist circuit | Chih-Yu Lin, Sahil Preet Singh, Hsien-Yu Pan, Yen-Huei Chen, Hung-Jen Liao | 2022-08-23 |
| 11404113 | Memory device including a word line with portions with different sizes in different metal layers | Yi-Hsin Nien, Wei Zhao, Chih-Yu Lin, Yen-Huei Chen, Ru-Yu WANG | 2022-08-02 |
| 11404115 | Memory with write assist scheme | Hung-Jen Liao, Yen-Huei Chen | 2022-08-02 |
| 11398275 | Memory computation circuit and method | Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang | 2022-07-26 |
| 11398257 | Header layout design including backside power rail | Haruki Mori, Chien-Chi TIEN, Chia-En Huang, Yen-Huei Chen, Feng-Lun CHEN | 2022-07-26 |
| 11322198 | Multi word line assertion | Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao | 2022-05-03 |
| 11308999 | Boost bypass circuitry in a memory storage device | Yen-Huei Chen | 2022-04-19 |
| 11264070 | Systems and methods for memory operation using local word lines | Yi-Hsin Nien, Yen-Huei Chen | 2022-03-01 |
| 11263331 | Electronic device for checking randomness of identification key device, random key checker circuit, and method of checking randomness of electronic device | Chien-Chen Lin, Wei Min Chan, Yen-Huei Chen, Shih-Lien Linus Lu | 2022-03-01 |
| 11199866 | Voltage regulator with power rail tracking | Haruki Mori, Zhi-Hao Chang, Yangsyu Lin, Yu-Hao Hsu, Yen-Huei Chen +2 more | 2021-12-14 |
| 11183234 | Bitcell supporting bit-write-mask function | Yen-Huei Chen, Yi-Hsin Nien | 2021-11-23 |
| 11176997 | Memory cell | Hung-Jen Liao, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin | 2021-11-16 |
| 11152301 | Memory cell having multi-level word line | Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao | 2021-10-19 |
| 11152057 | SRAM memory | Cheng Chun Dai, Chih-Yu Lin, Yen-Huei Chen, Hiroki Noguchi | 2021-10-19 |
| 11139040 | Method of detecting address decoding error | Ching-Wei Wu, Chun-Hao Chang | 2021-10-05 |
| 11088151 | 4Cpp SRAM cell and array | Chia-En Huang, Yen-Huei Chen, Yih Wang | 2021-08-10 |
| 11074966 | Method and system to balance ground bounce | Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao | 2021-07-27 |
| 11062739 | Semiconductor chip having memory and logic cells | Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao | 2021-07-13 |