HP

Hsien-Yu Pan

TSMC: 32 patents #1,063 of 12,232Top 9%
Overall (All Time): #111,128 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDate
12408316 Memory array circuit and method of manufacturing same Hidehiro Fujiwara, Chih-Yu Lin, Yasutoshi Okuno, Yen-Huei Chen, Hung-Jen Liao 2025-09-02
12100436 Method and system to balance ground bounce Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2024-09-24
12074156 Memory array circuit and method of manufacturing same Hidehiro Fujiwara, Sahil Preet Singh, Chih-Yu Lin, Yen-Huei Chen, Hung-Jen Liao 2024-08-27
12029023 Memory array circuit and method of manufacturing same Hidehiro Fujiwara, Chih-Yu Lin, Yasutoshi Okuno, Yen-Huei Chen, Hung-Jen Liao 2024-07-02
11948627 Static random access memory with write assist circuit Hidehiro Fujiwara, Chih-Yu Lin, Sahil Preet Singh, Yen-Huei Chen, Hung-Jen Liao 2024-04-02
11769533 Semiconductor chip having memory and logic cells Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2023-09-26
11657870 Method and system to balance ground bounce Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2023-05-23
11637108 Memory array circuit and method of manufacturing same Hidehiro Fujiwara, Chih-Yu Lin, Yasutoshi Okuno, Yen-Huei Chen, Hung-Jen Liao 2023-04-25
11423977 Static random access memory with write assist circuit Hidehiro Fujiwara, Chih-Yu Lin, Sahil Preet Singh, Yen-Huei Chen, Hung-Jen Liao 2022-08-23
11322198 Multi word line assertion Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2022-05-03
11176997 Memory cell Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin 2021-11-16
11074966 Method and system to balance ground bounce Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2021-07-27
11062739 Semiconductor chip having memory and logic cells Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2021-07-13
11018142 Memory cell and method of manufacturing the same Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Yasutoshi Okuno 2021-05-25
10971217 SRAM cell for interleaved wordline scheme Hidehiro Fujiwara, Hung-Jen Liao, Yen-Huei Chen, Mahmut Sinangil 2021-04-06
10964683 Memory array circuit and method of manufacturing the same Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Sahil Preet Singh 2021-03-30
10964389 Memory cell Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin 2021-03-30
10943667 Memory device Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Hiroki Noguchi, Wei Zhao 2021-03-09
10892008 Multi word line assertion Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen, Wei Zhao 2021-01-12
10832765 Variation tolerant read assist circuit for SRAM Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Sahil Preet Singh 2020-11-10
10770131 SRAM cell for interleaved wordline scheme Hidehiro Fujiwara, Hung-Jen Liao, Yen-Huei Chen, Mahmut Sinangil 2020-09-08
10734066 Static random access memory with write assist circuit Hidehiro Fujiwara, Chih-Yu Lin, Sahil Preet Singh, Yen-Huei Chen, Hung-Jen Liao 2020-08-04
10714181 Memory cell Hidehiro Fujiwara, Hung-Jen Liao, Chih-Yu Lin, Yen-Huei Chen, Chien-Chen Lin 2020-07-14
10510739 Method of providing layout design of SRAM cell Hidehiro Fujiwara, Tetsu Ohtou, Chih-Yu Lin, Yasutoshi Okuno, Yen-Huei Chen 2019-12-17
10276579 Layout design for manufacturing a memory cell Hidehiro Fujiwara, Hung-Jen Liao, Yen-Huei Chen 2019-04-30