Issued Patents All Time
Showing 101–125 of 136 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10553300 | Method of detecting address decoding error and address decoder error detection system | Ching-Wei Wu, Chun-Hao Chang | 2020-02-04 |
| 10522459 | Method for fabricating semiconductor device having buried metal line | Tetsu Ohtou, Yusuke Oniki | 2019-12-31 |
| 10510739 | Method of providing layout design of SRAM cell | Tetsu Ohtou, Chih-Yu Lin, Hsien-Yu Pan, Yasutoshi Okuno, Yen-Huei Chen | 2019-12-17 |
| 10510403 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2019-12-17 |
| 10411019 | SRAM cell word line structure with reduced RC effects | Wei Min Chan, Chih-Yu Lin, Yen-Huei Chen, Hung-Jen Liao | 2019-09-10 |
| 10354952 | Memory cell having multi-level word line | Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao | 2019-07-16 |
| 10354731 | Failure detection circuitry for address decoder for a data storage device | Ching-Wei Wu | 2019-07-16 |
| 10304527 | Semiconductor integrated circuit device | Makoto Yabuuchi | 2019-05-28 |
| 10276231 | SRAM cell for interleaved wordline scheme | Hung-Jen Liao, Hsien-Yu Pan, Yen-Huei Chen, Mahmut Sinangil | 2019-04-30 |
| 10276579 | Layout design for manufacturing a memory cell | Hung-Jen Liao, Hsien-Yu Pan, Yen-Huei Chen | 2019-04-30 |
| 10170413 | Semiconductor device having buried metal line and fabrication method of the same | Tetsu Ohtou, Yusuke Oniki | 2019-01-01 |
| 10163491 | Memory circuit having shared word line | Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao | 2018-12-25 |
| 10153038 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2018-12-11 |
| 10141059 | Failure detection circuitry for address decoder for a data storage device | Ching-Wei Wu | 2018-11-27 |
| 10062419 | Digtial circuit structures | Chih-Yu Lin, Wei-Cheng Wu, Yen-Huei Chen, Hung-Jen Liao | 2018-08-28 |
| 9984767 | Semiconductor device having capability of generating chip identification information | Makoto Yabuuchi, Koji Nii, Yoshikazu Saito | 2018-05-29 |
| 9947393 | Semiconductor integrated circuit device | Makoto Yabuuchi | 2018-04-17 |
| 9922700 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2018-03-20 |
| 9886996 | SRAM cell for interleaved wordline scheme | Hung-Jen Liao, Hsien-Yu Pan, Yen-Huei Chen, Mahmut Sinangil | 2018-02-06 |
| 9837130 | Digtial circuit structures to control leakage current | Chih-Yu Lin, Wei-Cheng Wu, Yen-Huei Chen, Hung-Jen Liao | 2017-12-05 |
| 9830977 | Semiconductor integrated circuit device | Makoto Yabuuchi | 2017-11-28 |
| 9741429 | Memory with write assist circuit | Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang | 2017-08-22 |
| 9640251 | Multi-port memory cell | Kao-Cheng Lin, Yen-Huei Chen, Hung-Jen Liao | 2017-05-02 |
| 9607683 | Emulator for imulating an operation of a SRAM | Yen-Huei Chen, Hung-Jen Liao | 2017-03-28 |
| 9496026 | Memory device with stable writing and/or reading operation | Mohammed Hasan Taufique, Hung-Jen Liao, Yen-Huei Chen | 2016-11-15 |