Issued Patents All Time
Showing 1–25 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406123 | System and method for ESL modeling of machine learning | Kai-Yuan Ting, Sandeep Kumar Goel, Yun-Han Lee | 2025-09-02 |
| 12355006 | Semiconductor packages and methods of manufacturing thereof | Shenggao Li | 2025-07-08 |
| 12308303 | Integrated circuit die with memory macro including through-silicon via and method of forming the same | Hidehiro Fujiwara, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang +2 more | 2025-05-20 |
| 12271667 | System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design | Haohua Zhou, Mei Hsu Wong | 2025-04-08 |
| 12261532 | Trim-based voltage regulator circuit and method | Haohua Zhou, Mei-Ting Hsu, Yun-Han Lee | 2025-03-25 |
| 12175175 | Systems and methods for generating synthesizable netlists from register transfer level designs | Boh-Yi Huang, Chao-Chun Lo, Chih-yuan Stephen Yu, Chen-jih Lui | 2024-12-24 |
| 12136609 | Semiconductor device and method of manufacture | Haohua Zhou, Mei Hsu Wong | 2024-11-05 |
| 12113051 | Die to die interface circuit | King-Ho Tam, Yu-Hao Liu | 2024-10-08 |
| 12095711 | Integrated circuit with radio frequency interconnect | Huan-Neng Chen, William Wu Shen, Chewn-Pu Jou, Feng-Wei Kuo, Lan-Chou Cho +2 more | 2024-09-17 |
| 12038463 | Integrated impedance measurement device and impedance measurement method thereof | Haohua Zhou, Mei Hsu Wong | 2024-07-16 |
| 12014130 | System and method for ESL modeling of machine learning | Kai-Yuan Ting, Sandeep Kumar Goel, Yun-Han Lee | 2024-06-18 |
| 11940822 | Semiconductor device including a voltage regulator and an integrated circuit module | Haohua Zhou, Mei Hsu Wong | 2024-03-26 |
| 11854943 | Memory macro including through-silicon via | Hidehiro Fujiwara, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang +2 more | 2023-12-26 |
| 11740272 | Integrated impedance measurement device and impedance measurement method thereof | Haohua Zhou, Mei Hsu Wong | 2023-08-29 |
| 11735565 | Semiconductor device and method of manufacture | Haohua Zhou, Mei Hsu Wong | 2023-08-22 |
| 11699683 | Semiconductor device in 3D stack with communication interface and managing method thereof | Igor Elkanovich, Amnon Parnass, Pei-Ling Yu, Li-Ken Yeh, Yung-Sheng Fang +3 more | 2023-07-11 |
| 11687472 | Interface for semiconductor device and interfacing method thereof | Igor Elkanovich, Amnon Parnass, Pei-Ling Yu, Li-Ken Yeh, Yung-Sheng Fang +3 more | 2023-06-27 |
| 11675731 | Data protection system and method thereof for 3D semiconductor device | Igor Elkanovich, Amnon Parnass, Pei-Ling Yu, Li-Ken Yeh, Yung-Sheng Fang +3 more | 2023-06-13 |
| 11671010 | Power delivery for multi-chip-package using in-package voltage regulator | Alan Roth, Haohua Zhou, Eric Soenen, Ying-Chih Hsu, Paul Ranucci +1 more | 2023-06-06 |
| 11669664 | System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design | Haohua Zhou, Mei Hsu Wong | 2023-06-06 |
| 11658158 | Die to die interface circuit | King-Ho Tam, Yu-Hao Liu | 2023-05-23 |
| 11632048 | Power state-based voltage regulator circuit and method | Haohua Zhou, Mei-Ting Hsu, Yun-Han Lee | 2023-04-18 |
| 11616631 | Integrated circuit with radio frequency interconnect | Huan-Neng Chen, William Wu Shen, Chewn-Pu Jou, Feng-Wei Kuo, Lan-Chou Cho +2 more | 2023-03-28 |
| 11568116 | Flip-flop based true random number generator (TRNG) structure and compiler for same | Charlie Zhou, Jack Liu | 2023-01-31 |
| 11562946 | Memory macro including through-silicon via | Hidehiro Fujiwara, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao, Jonathan Tsung-Yung Chang +2 more | 2023-01-24 |