Issued Patents All Time
Showing 51–75 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11967547 | Solder resist structure to mitigate solder bridge risk | Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2024-04-23 |
| 11915992 | Method for forming package structure with lid | Shin-Puu Jeng, Po-Yao Lin, Feng-Cheng Hsu, Shuo-Mao Chen | 2024-02-27 |
| 11894320 | Semiconductor device package with stress reduction design and method of forming the same | Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2024-02-06 |
| 11862528 | Method for forming semiconductor package | Po-Yao Lin, Feng-Cheng Hsu, Shin-Puu Jeng, Wen-Yi Lin, Shu-Shen Yeh | 2024-01-02 |
| 11862549 | Semiconductor packages having conductive patterns of redistribution structure having ellipse-like shape | Chia-Kuei Hsu, Ming-Chih Yew, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2024-01-02 |
| 11862580 | Semiconductor package | Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2024-01-02 |
| 11855009 | Chip package with lid | Shu-Shen Yeh, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng | 2023-12-26 |
| 11854929 | Semiconductor package and method of forming the same | Yu-Sheng Lin, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng | 2023-12-26 |
| 11855008 | Stacking via structures for stress reduction | Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng, Chia-Hsiang Lin | 2023-12-26 |
| 11830859 | Package structures and method for forming the same | Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng | 2023-11-28 |
| 11798897 | Package structure and methods of manufacturing the same | Shu-Shen Yeh, Po-Yao Lin, Chia-Kuei Hsu, Shin-Puu Jeng | 2023-10-24 |
| 11784130 | Structure and formation method of package with underfill | Yu-Sheng Lin, Shin-Puu Jeng, Po-Yao Lin, Shu-Shen Yeh, Che-Chia Yang | 2023-10-10 |
| 11784061 | Chip package structure and method for forming the same | Yu-Sheng Lin, Po-Yao Lin, Shu-Shen Yeh, Shin-Puu Jeng | 2023-10-10 |
| 11756854 | Package structure and method of fabricating the same | Yu-Sheng Lin, Po-Yao Lin, Shu-Shen Yeh, Shin-Puu Jeng | 2023-09-12 |
| 11728233 | Chip package structure with ring structure and method for forming the same | Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng, Po-Chen Lai, Kuang-Chun Lee +2 more | 2023-08-15 |
| 11728284 | Chip package structure and method for forming the same | Po-Chen Lai, Ming-Chih Yew, Chia-Kuei Hsu, Li-Ling Liao, Po-Yao Lin +1 more | 2023-08-15 |
| 11721643 | Package structure | Po-Chen Lai, Ming-Chih Yew, Che-Chia Yang, Shu-Shen Yeh, Po-Yao Lin +1 more | 2023-08-08 |
| 11715731 | Package structure and method of forming the same | Po-Yao Lin, Shu-Shen Yeh, Yu-Sheng Lin, Shin-Puu Jeng | 2023-08-01 |
| 11705406 | Package structure and method for forming the same | Po-Chen Lai, Ming-Chih Yew, Li-Ling Liao, Tsung-Yen Lee, Po-Yao Lin +1 more | 2023-07-18 |
| 11694974 | Semiconductor die with warpage release layer structure in package and fabricating method thereof | Kuang-Chun Lee, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng | 2023-07-04 |
| 11682602 | Semiconductor device and method of manufacture | Shu-Shen Yeh, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng | 2023-06-20 |
| 11676826 | Semiconductor die package with ring structure for controlling warpage of a package substrate | Yu-Sheng Lin, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2023-06-13 |
| 11670601 | Stacking via structures for stress reduction | Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng, Chia-Hsiang Lin | 2023-06-06 |
| 11637087 | Multi-chip device and method of formation | Po-Chen Lai, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng | 2023-04-25 |
| 11574861 | Semiconductor package | Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2023-02-07 |