Issued Patents All Time
Showing 276–300 of 448 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6340894 | Semiconductor testing apparatus including substrate with contact members and conductive polymer interconnect | Warren M. Farnworth, Alan G. Wood, David R. Hembree | 2002-01-22 |
| 6340624 | Method of forming a circuitry isolation region within a semiconductive wafer | Mark Durcan | 2002-01-22 |
| 6338667 | System for real-time control of semiconductor wafer polishing | Gurtej S. Sandhu | 2002-01-15 |
| 6335225 | High density direct connect LOC assembly | — | 2002-01-01 |
| 6333240 | Method of spacing a capacitor from a contact site | D. Mark Durcan, Roger Lee, Fernando Gonzalez | 2001-12-25 |
| 6331488 | Planarization process for semiconductor substrates | Guy T. Blalock, Mark Durcan, Scott Meikle | 2001-12-18 |
| 6329666 | Controllable ovonic phase-change semiconductor memory device and methods of fabricating the same | D. Mark Durcan, Brent Gilgen | 2001-12-11 |
| 6329263 | Method of forming a container capacitor structure | D. Mark Durcan, Roger Lee, Fernando Gonzalez, Er-Xuan Ping | 2001-12-11 |
| 6323138 | Capacitor, methods of forming capacitors, methods for forming silicon nitride layers on silicon-comprising substrates, and methods of densifying silicon nitride layers | — | 2001-11-27 |
| 6323540 | Semiconductor processing method of forming a contact opening to a region adjacent a field isolation mass, and a semiconductor structure | Charles H. Dennison | 2001-11-27 |
| 6323101 | Semiconductor processing methods, methods of forming silicon dioxide methods of forming trench isolation regions, and methods of forming interlevel dielectric layers | Weimin Li, David L. Chapek | 2001-11-27 |
| 6306009 | System for real-time control of semiconductor wafer polishing | Gurtej S. Sandhu | 2001-10-23 |
| 6303953 | Integrated capacitor bottom electrode with etch stop layer | Thomas A. Figura | 2001-10-16 |
| 6300219 | Method of forming trench isolation regions | Gurtej S. Sandhu | 2001-10-09 |
| 6301006 | Endpoint detector and method for measuring a change in wafer thickness | — | 2001-10-09 |
| 6294452 | Controllable ovonic phase-change semiconductor memory device and methods of fabricating the same | D. Mark Durcan, Brent Gilgen | 2001-09-25 |
| 6291340 | Method of forming low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer | Gurtej S. Sandhu, Tyler Lowrey | 2001-09-18 |
| 6291289 | Method of forming DRAM trench capacitor with metal layer over hemispherical grain polysilicon | Howard E. Rhodes, Lyle Breiner, Philip J. Ireland, Gurtej S. Sandhu, Sujit Sharan | 2001-09-18 |
| 6284660 | Method for improving CMP processing | — | 2001-09-04 |
| 6281091 | Container capacitor structure and method of formation thereof | D. Mark Durcan, Roger Lee, Fernando Gonzalez | 2001-08-28 |
| 6281103 | Method for fabricating gate semiconductor | — | 2001-08-28 |
| 6281109 | Advance metallization process | Manny K. F. Ma, Jeff Zhiqiang Wu | 2001-08-28 |
| 6274423 | Etch process for aligning a capacitor structure and an adjacent contact corridor | Kirk D. Prall, Pierre C. Fazan, Tyler Lowrey | 2001-08-14 |
| 6271561 | Method for fabricating floating gate semiconductor devices with trench isolation structures and self aligned floating gates | — | 2001-08-07 |
| 6261151 | System for real-time control of semiconductor wafer polishing | Gurtej S. Sandhu | 2001-07-17 |