Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MD

Mark Durcan — 20 Patents

Micron: 19 patents #916 of 6,374Top 15%
AIAptina Imaging: 1 patents #187 of 332Top 60%
Boise, ID: #495 of 3,546 inventorsTop 15%
Idaho: #704 of 8,810 inventorsTop 8%
Overall (All Time): #214,803 of 4,157,543Top 6%
20 Patents All Time
Mark Durcan has been granted 20 US patents while listed as an inventor at Micron. The first was granted in 2000 and the most recent in November 2009. Mark Durcan ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Mark Durcan in Boise, ID, US.

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7619672 Retrograde well structure for a CMOS imager Howard E. Rhodes 2009-11-17
7365384 Trench buried bit line memory devices and methods thereof Luan C. Tran, Howard C. Kirsch 2008-04-29 $1,653,000
7170124 Trench buried bit line memory devices and methods thereof Luan C. Tran, Howard C. Kirsch 2007-01-30 $2,478,000
6995059 Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions Tyler Lowrey, Luan C. Tran, Alan R. Reinberg 2006-02-07 $2,952,000
6858460 Retrograde well structure for a CMOS imager Howard E. Rhodes 2005-02-22 $1,354,000
6806137 Trench buried bit line memory devices and methods thereof Luan C. Tran, Howard C. Kirsch 2004-10-19 $1,661,000
6787819 Retrograde well structure for a CMOS imager Howard E. Rhodes 2004-09-07 $988,000
6743724 Planarization process for semiconductor substrates Trung T. Doan, Guy T. Blalock, Scott Meikle 2004-06-01 $2,776,000
6734482 Trench buried bit line memory devices Luan C. Tran, Howard C. Kirsch 2004-05-11 $2,113,000
6686220 Retrograde well structure for a CMOS imager Howard E. Rhodes 2004-02-03 $3,037,000
6599800 Methods of forming capacitors, and methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions Tyler Lowrey, Luan C. Tran, Alan R. Reinberg 2003-07-29 $3,127,000
6483129 Retrograde well structure for a CMOS imager Howard E. Rhodes 2002-11-19 $4,057,000
6445014 Retrograde well structure for a CMOS imager Howard E. Rhodes 2002-09-03 $3,391,000
6417102 Semiconductor processing method using high pressure liquid media treatment David A. Cathey 2002-07-09 $4,358,000
6340624 Method of forming a circuitry isolation region within a semiconductive wafer Trung T. Doan 2002-01-22 $26,150,000
6333264 Semiconductor processing method using high pressure liquid media treatment David A. Cathey 2001-12-25
6331488 Planarization process for semiconductor substrates Trung T. Doan, Guy T. Blalock, Scott Meikle 2001-12-18 $12,905,000
6310366 Retrograde well structure for a CMOS imager Howard E. Rhodes 2001-10-30 $9,423,000
6274928 Single deposition layer metal dynamic random access memory Stephen L. Casper, Timothy J. Allen, Brian M. Shirley, Howard E. Rhodes 2001-08-14 $11,619,000
6100162 Method of forming a circuitry isolation region within a semiconductive wafer Trung T. Doan 2000-08-08 $31,220,000