SA

Salman Akram

Micron: 696 patents #4 of 6,345Top 1%
Koniniklijke Philips N.V.: 7 patents #1,078 of 7,486Top 15%
AI Aptina Imaging: 6 patents #45 of 332Top 15%
LU Lumileds: 5 patents #102 of 528Top 20%
RR Round Rock Research: 4 patents #47 of 239Top 20%
FS Fairchild Semiconductor: 2 patents #274 of 715Top 40%
MT Micorn Technology: 1 patents #1 of 8Top 15%
📍 Boise, ID: #2 of 3,546 inventorsTop 1%
🗺 Idaho: #3 of 8,810 inventorsTop 1%
Overall (All Time): #148 of 4,157,543Top 1%
726
Patents All Time

Issued Patents All Time

Showing 526–550 of 726 patents

Patent #TitleCo-InventorsDate
6239590 Calibration target for calibrating semiconductor wafer test systems Andrew J. Krivy, Warren M. Farnworth, David R. Hembree, James M. Wark, John O. Jacobson 2001-05-29
6235630 Silicide pattern structures and methods of fabricating the same Y. Jeff Hu 2001-05-22
6235554 Method for fabricating stackable chip scale semiconductor package Alan G. Wood, Warren M. Farnworth 2001-05-22
6232243 Interconnect having recessed contact members with penetrating blades for testing semiconductor dice and packages with contact bumps Warren M. Farnworth, Derek Gochnour 2001-05-15
6228687 Wafer-level package and methods of fabricating Alan G. Wood 2001-05-08
6229324 Test system with mechanical alignment for semiconductor chip scale packages and dice Warren M. Farnworth, David R. Hembree 2001-05-08
6224713 Method and apparatus for ultrasonic wet etching of silicon David R. Hembree 2001-05-01
6222265 Method of constructing stacked packages Jerry M. Brooks 2001-04-24
6222379 Conventionally sized temporary package for testing semiconductor dice Warren M. Farnworth, Alan G. Wood, David R. Hembree 2001-04-24
6222280 Test interconnect for semiconductor components having bumped and planar contacts Warren M. Farnworth 2001-04-24
6218259 Capacitor and method for forming the same 2001-04-17
6218848 Semiconductor probe card having resistance measuring circuitry and method of fabrication David R. Hembree 2001-04-17
6214641 Method of fabricating a multi-chip module 2001-04-10
6214635 Method and apparatus for underfill of bumped or raised die James M. Wark 2001-04-10
6215322 Conventionally sized temporary package for testing semiconductor dice Warren M. Farnworth, Alan G. Wood, David R. Hembree 2001-04-10
6215181 Method and apparatus providing redundancy for fabricating highly reliable memory modules James M. Wark, David R. Hembree 2001-04-10
6214716 Semiconductor substrate-based BGA interconnection and methods of farication same 2001-04-10
6210993 High density semiconductor package and method of fabrication Warren M. Farnworth, Alan G. Wood, Mike Brooks, Eugene H. Cloud 2001-04-03
6208157 Method for testing semiconductor components David R. Hembree, Warren M. Farnworth, Derek Gochnour, Alan G. Wood, John O. Jacobson 2001-03-27
6207548 Method for fabricating a micromachined chip scale package David R. Hembree, Warren M. Farnworth 2001-03-27
6204678 Direct connect interconnect for testing semiconductor dice and wafers James M. Wark, Warren M. Farnworth 2001-03-20
6196096 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Derek Gochnour, Michael E. Hess, David R. Hembree 2001-03-06
6194243 Method of production an underfill of a bumped or raised die using a barrier adjacent to the sidewall of a semiconductor device James M. Wark 2001-02-27
6190945 Integrated heat sink 2001-02-20
6189120 Testing system for evaluating integrated circuits, a burn-in testing system, and a method for testing an integrated circuit 2001-02-13