SA

Salman Akram

Micron: 696 patents #4 of 6,345Top 1%
Koniniklijke Philips N.V.: 7 patents #1,078 of 7,486Top 15%
AI Aptina Imaging: 6 patents #45 of 332Top 15%
LU Lumileds: 5 patents #102 of 528Top 20%
RR Round Rock Research: 4 patents #47 of 239Top 20%
FS Fairchild Semiconductor: 2 patents #274 of 715Top 40%
MT Micorn Technology: 1 patents #1 of 8Top 15%
📍 Boise, ID: #2 of 3,546 inventorsTop 1%
🗺 Idaho: #3 of 8,810 inventorsTop 1%
Overall (All Time): #148 of 4,157,543Top 1%
726
Patents All Time

Issued Patents All Time

Showing 501–525 of 726 patents

Patent #TitleCo-InventorsDate
6279563 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Derek Gochnour, Michael E. Hess, David R. Hembree 2001-08-28
6278286 Interconnect and system for making temporary electrical connections to semiconductor components Warren M. Farnworth 2001-08-21
6277262 Method and apparatus for continuous processing of semiconductor wafers David R. Hembree 2001-08-21
6274390 Method and apparatus providing redundancy for fabricating highly reliable memory modules James M. Wark, David R. Hembree 2001-08-14
6275052 Probe card and testing method for semiconductor wafers David R. Hembree, Warren M. Farnworth, Alan G. Wood, C. Patrick Doherty, Andrew J. Krivy 2001-08-14
6271590 Graded layer for use in semiconductor circuits and method for making same Scott Meikle 2001-08-07
6268650 Semiconductor device, ball grid array connection system, and method of making Larry D. Kinsman 2001-07-31
6265245 Compliant interconnect for testing a semiconductor die Warren M. Farnworth, Alan G. Wood 2001-07-24
6261913 Method for using thin spacers and oxidation in gate oxides Mohamed A. Ditali 2001-07-17
6261865 Multi chip semiconductor package and method of construction 2001-07-17
6261854 Interconnect with pressure sensing mechanism for testing semiconductor wafers Warren M. Farnworth 2001-07-17
6255840 Semiconductor package with wire bond protective member David R. Hembree, Derek Gochnour, Warren M. Farnworth 2001-07-03
6255833 Method for testing semiconductor dice and chip scale packages Alan G. Wood, David R. Hembree, Warren M. Farnworth 2001-07-03
6255213 Method of forming a structure upon a semiconductive substrate 2001-07-03
6255196 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Derek Gochnour, Michael E. Hess, David R. Hembree 2001-07-03
6253758 Apparatus for reducing damage to wafer cutting blades during wafer dicing James M. Wark 2001-07-03
6253755 Method for reducing damage to wafer cutting blades during wafer dicing James M. Wark 2001-07-03
6250192 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions Derek Gochnour, Michael E. Hess, David R. Hembree 2001-06-26
6252308 Packaged die PCB with heat sink encapsulant James M. Wark 2001-06-26
6248429 Metallized recess in a substrate John R. C. Futrell, Steven M. McDonald 2001-06-19
6248962 Electrically conductive projections of the same material as their substrate 2001-06-19
6246245 Probe card, test method and test system for semiconductor wafers C. Patrick Doherty, Warren M. Farnworth, David R. Hembree 2001-06-12
6246250 Probe card having on-board multiplex circuitry for expanding tester resources C. Patrick Doherty, Jorge L. deVarona 2001-06-12
6245594 Methods for forming conductive micro-bumps and recessed contacts for flip-chip technology and method of flip-chip assembly Zhiqiang Wu, Tongbi Jiang 2001-06-12
6242935 Interconnect for testing semiconductor components and method of fabrication 2001-06-05