Issued Patents All Time
Showing 76–100 of 292 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6773981 | Methods of forming capacitors | Husam N. Al-Shareef, Scott DeBoer, F. Daniel Gealy | 2004-08-10 |
| 6737696 | DRAM capacitor formulation using a double-sided electrode | Scott J. DeBoer, Husam N. Al-Shareef | 2004-05-18 |
| 6730584 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | Klaus Schuegraf, Carl Marshall Eliot Powell | 2004-05-04 |
| 6717211 | Shallow doped junctions with a variable profile gradation of dopants | Fernando Gonzalez | 2004-04-06 |
| 6699752 | Formation of conductive rugged silicon | Er-Xuan Ping | 2004-03-02 |
| 6690044 | Approach to avoid buckling BPSG by using an intermediate barrier layer | Trung T. Doan, Yauh-Ching Liu | 2004-02-10 |
| 6682970 | Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer | Garry Mercaldi, Michael Nuttall | 2004-01-27 |
| 6677247 | Method of increasing the etch selectivity of a contact sidewall to a preclean etchant | Zheng Yuan, Steve Ghanayem | 2004-01-13 |
| 6677661 | Semiconductive wafer assemblies | Scott DeBoer, John T. Moore, Mark Fischer | 2004-01-13 |
| 6673689 | Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same | Husam N. Al-Shareef, Scott DeBoer | 2004-01-06 |
| 6670288 | Methods of forming a layer of silicon nitride in a semiconductor fabrication process | Scott DeBoer, John T. Moore, Mark Fischer | 2003-12-30 |
| 6669782 | Method and apparatus to control the formation of layers useful in integrated circuits | — | 2003-12-30 |
| 6667540 | Method and apparatus for reducing fixed charge in semiconductor device layers | Ravi Iyer, Howard E. Rhodes | 2003-12-23 |
| 6660611 | Method to form a corrugated structure for enhanced capacitance with plurality of boro-phospho silicate glass including germanium | Gordon A. Haller, Kirk D. Prall | 2003-12-09 |
| 6645845 | Methods of forming interconnect regions of integrated circuitry | Klaus Schuegraf | 2003-11-11 |
| 6635568 | Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients | — | 2003-10-21 |
| 6635547 | DRAM capacitor formulation using a double-sided electrode | Scott J. DeBoer, Husam N. Al-Shareef | 2003-10-21 |
| 6627508 | Method of forming capacitors containing tantalum | Scott DeBoer, F. Daniel Gealy | 2003-09-30 |
| 6620534 | Film having enhanced reflow characteristics at low thermal budget | Gurtei Sandhu | 2003-09-16 |
| 6620740 | Methods to form electronic devices | — | 2003-09-16 |
| 6611032 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | Klaus Schuegraf, Carl Marshall Eliot Powell | 2003-08-26 |
| 6596651 | Method for stabilizing high pressure oxidation of a semiconductor device | F. Daniel Gealy, Scott DeBoer, Dave Chapek, Husam N. Al-Shareef | 2003-07-22 |
| 6596595 | Forming a conductive structure in a semiconductor device | Ronald A. Weimer, Yongjun Jeff Hu, Pai-Hung Pan, Deepa Ratakonda, James A. Beck | 2003-07-22 |
| 6593183 | Semiconductor processing method using a barrier layer | Kunal R. Parekh | 2003-07-15 |
| 6592661 | Method for processing wafers in a semiconductor fabrication system | Ronald A. Weimer | 2003-07-15 |