Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831889 | Secure memory implementation for secure execution of virtual machines | William E. Hall, Guerney D. H. Hunt, Jentje Leenstra, Paul Mackerras, William J. Starke +1 more | 2020-11-10 |
| 10776281 | Snoop invalidate filter for distributed memory management unit to reduce snoop invalidate latency | Jake Truelove, Jody B. Joyner, Benjamin Herrenschmidt, David A. Larson Stanton | 2020-09-15 |
| 10671537 | Reducing translation latency within a memory management unit using external caching structures | Guy L. Guthrie, Jody B. Joyner, Michael S. Siegel, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-06-02 |
| 10649902 | Reducing translation latency within a memory management unit using external caching structures | Guy L. Guthrie, Jody B. Joyner, Michael S. Siegel, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-05-12 |
| 10474816 | Secure memory implementation for secure execution of Virtual Machines | William E. Hall, Guerney D. H. Hunt, Jentje Leenstra, Paul Mackerras, William J. Starke +1 more | 2019-11-12 |
| 10296741 | Secure memory implementation for secure execution of virtual machines | William E. Hall, Guerney D. H. Hunt, Jentje Leenstra, Paul Mackerras, William J. Starke +1 more | 2019-05-21 |
| 9003417 | Processor with resource usage counters for per-thread accounting | William J. Armstrong, Michael Stephen Floyd, Larry Scott Leitner, Balaram Sinharoy | 2015-04-07 |
| 8650442 | Programming in a simultaneous multi-threaded processor environment | Luai A. Abou-Emara, Jen-Yeu Chen | 2014-02-11 |
| 8387065 | Speculative popcount data creation | Ravi Kumar Arimilli, Balaram Sinharoy | 2013-02-26 |
| 8356151 | Reporting of partially performed memory move | Ravi Kumar Arimilli, Robert S. Blackmore, Chulho Kim, Balaram Sinharoy, Hanhong Xue | 2013-01-15 |
| 8356210 | Programming in a simultaneous multi-threaded processor environment including permitting apparently exclusive access to multiple threads and disabling processor features during thread testing | Luai A. Abou-Emara, Jen-Yeu Chen | 2013-01-15 |
| 8296739 | Testing soft error rate of an application program | Jeffrey William Kellington, Naoko Pia Sanda, Todd A. Venton | 2012-10-23 |
| 8281075 | Processor system and methods of triggering a block move using a system bus write command initiated by user code | Lakshminarayana B. Arimilli, Brian Mitchell Bass, David W. Cummings, Bernard C. Drerup, Guy L. Guthrie +4 more | 2012-10-02 |
| 8209698 | Processor core with per-thread resource usage accounting logic | William J. Armstrong, Michael Stephen Floyd, Larry Scott Leitner, Balaram Sinharoy | 2012-06-26 |
| 8166345 | Programming in a simultaneous multi-threaded processor environment | Luai A. Abou-Emara, Jen-Yeu Chen | 2012-04-24 |
| 8145885 | Apparatus for randomizing instruction thread interleaving in a multi-thread processor | Minh Michelle Quy Pham, Balaram Sinharoy, John W. Ward, III | 2012-03-27 |
| 8122410 | Specifying and validating untimed nets | Jack DiLullo, Gavin B. Meil, Jeffrey M. Ritzinger | 2012-02-21 |
| 7996564 | Remote asynchronous data mover | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Ramakrishnan Rajamony, Balaram Sinharoy, William E. Speight +1 more | 2011-08-09 |
| 7949859 | Mechanism for avoiding check stops in speculative accesses while operating in real mode | Cathy May, Balaram Sinharoy, Edward John Silha, Shih-Hsiung S. Tung | 2011-05-24 |
| 7937570 | Termination of in-flight asynchronous memory move | Ravi Kumar Arimilli, Robert S. Blackmore, Chulho Kim, Balaram Sinharoy, Hanhong Xue | 2011-05-03 |
| 7827388 | Apparatus for adjusting instruction thread priority in a multi-thread processor | John W. Ward, III, Minh Michelle Quy Pham, Balaram Sinharoy | 2010-11-02 |
| 7657893 | Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor | William J. Armstrong, Michael Stephen Floyd, Larry Scott Leitner, Balaram Sinharoy | 2010-02-02 |
| 7469407 | Method for resource balancing using dispatch flush in a simultaneous multithread processor | William E. Burky, Richard J. Eickemeyer, David S. Levitan, Balaram Sinharoy, John W. Ward, III | 2008-12-23 |
| 7444547 | Method, system, and product for programming in a simultaneous multi-threaded processor environment | Luai A. Abou-Emara, Jen-Yeu Chen | 2008-10-28 |
| 7401207 | Apparatus and method for adjusting instruction thread priority in a multi-thread processor | Minh Michelle Quy Pham, Balaram Sinharoy, John W. Ward, III | 2008-07-15 |