Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12344079 | Automotive side door structure | Lawrence Michael Plourde, Jr., Mari Chellman, Armando Perez, III, Vijaykumar Gabbita | 2025-07-01 |
| 12049126 | Vehicle sliding door system | Lawrence Michael Plourde, Jr., Ryan Robert Warpup, Sten Burris, Arun Kumar Reddyvaripalli Narayanaswamy | 2024-07-30 |
| 10394998 | Acceleration of memory walking sequences during simulation | Douglas A. MacKay, Vasantha R. Vuyyuru | 2019-08-27 |
| 9606922 | Selection of post-request action based on combined response and input from the request source | Bartholomew Blaner, Brian Flachs, Michael S. Siegel, Jeffrey A. Stuecheli | 2017-03-28 |
| 9594654 | Generating and detecting hang scenarios in a partially populated simulation environment | Aaron C. Brown, Jeff Jerome Frankeny, Jonathan R. Jackson | 2017-03-14 |
| 9547597 | Selection of post-request action based on combined response and input from the request source | Bartholomew Blaner, Brian Flachs, Michael S. Siegel, Jeffrey A. Stuecheli | 2017-01-17 |
| 9523517 | Solar panel mounting structure | Ryan Robert Warpup, Mark F. Werner, Eric Anthony Powrozek, Peter M. Szadyr | 2016-12-20 |
| 9507898 | Identification of mistimed forcing of values in design simulation | Santosh Balasubramanian, Aaron C. Brown, Ambalath Matayambath Roopesh | 2016-11-29 |
| 9442852 | Programmable coherent proxy for attached processor | Bartholomew Blaner, Michael S. Siegel, William J. Starke, Jeff A. Stuecheli | 2016-09-13 |
| 9390013 | Coherent attached processor proxy supporting coherence state update in presence of dispatched master | Bartholomew Blaner, Michael S. Siegel, Jeffrey A. Stuecheli | 2016-07-12 |
| 9367458 | Programmable coherent proxy for attached processor | Bartholomew Blaner, Michael S. Siegel, William J. Starke, Jeff A. Stuecheli | 2016-06-14 |
| 9323702 | Increasing coverage of delays through arbitration logic | Jonathan R. Jackson, Guy L. Guthrie | 2016-04-26 |
| 9256537 | Coherent attached processor proxy supporting coherence state update in presence of dispatched master | Bartholomew Blaner, Michael S. Siegel, Jeffrey A. Stuecheli | 2016-02-09 |
| 9251077 | Accelerated recovery for snooped addresses in a coherent attached processor proxy | Bartholomew Blaner, George William Daly, Michael S. Siegel, Jeff A. Stuecheli | 2016-02-02 |
| 9146872 | Coherent attached processor proxy supporting master parking | Bartholomew Blaner, Michael S. Siegel, Jeff A. Stuecheli | 2015-09-29 |
| 9135174 | Coherent attached processor proxy supporting master parking | Bartholomew Blaner, Michael S. Siegel, Jeff A. Stuecheli | 2015-09-15 |
| 9015024 | Enabling reuse of unit-specific simulation irritation in multiple environments | Jonathan R. Jackson, James A. McClurg, Nathan A. Murati | 2015-04-21 |
| 9009018 | Enabling reuse of unit-specific simulation irritation in multiple environments | Jonathan R. Jackson, James A. McClurg, Nathan A. Murati | 2015-04-14 |
| 8990513 | Accelerated recovery for snooped addresses in a coherent attached processor proxy | Bartholomew Blaner, George William Daly, Michael S. Siegel, Jeff A. Stuecheli | 2015-03-24 |
| 8281075 | Processor system and methods of triggering a block move using a system bus write command initiated by user code | Lakshminarayana B. Arimilli, Brian Mitchell Bass, Bernard C. Drerup, Guy L. Guthrie, Ronald Nick Kalla +4 more | 2012-10-02 |
| 8117390 | Updating partial cache lines in a data processing system | Guy L. Guthrie, Hugh Shen, William J. Starke, Derek E. Williams, Phillip G. Williams | 2012-02-14 |
| 8095739 | Barriers processing in a multiprocessor system having a weakly ordered storage architecture without broadcast of a synchronizing operation | Guy L. Guthrie, Harmony L. Helterhoff, Derek E. Williams | 2012-01-10 |
| 6186575 | Re-configurable cargo cover | Kevin Michael Fisher, James R. Chesnick | 2001-02-13 |