Issued Patents All Time
Showing 1–25 of 142 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11748280 | Broadcast scope selection in a data processing system utilizing a memory topology data structure | Guy L. Guthrie | 2023-09-05 |
| 11615024 | Speculative delivery of data from a lower level of a memory hierarchy in a data processing system | Derek E. Williams, Guy L. Guthrie, Bernard C. Drerup | 2023-03-28 |
| 11449489 | Split transaction coherency protocol in a data processing system | Bernard C. Drerup, Guy L. Guthrie, Jeffrey A. Stuecheli | 2022-09-20 |
| 11341060 | Multifunction communication interface supporting memory sharing among data processing systems | William J. Starke, Jeffrey A. Stuecheli, Lakshminarayana B. Arimilli, Kenneth M. Valk, James Francis Mikos +1 more | 2022-05-24 |
| 11113204 | Translation invalidation in a translation cache serving an accelerator | Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, Kenneth M. Valk, John D. Irish +1 more | 2021-09-07 |
| 11074205 | Managing efficient selection of a particular processor thread for handling an interrupt | Richard Louis Arndt, Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie +1 more | 2021-07-27 |
| 11030110 | Integrated circuit and data processing system supporting address aliasing in an accelerator | Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, Derek E. Williams, Kenneth M. Valk +2 more | 2021-06-08 |
| 10846235 | Integrated circuit and data processing system supporting attachment of a real address-agnostic accelerator | Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, Kenneth M. Valk, John D. Irish +1 more | 2020-11-24 |
| 10761995 | Integrated circuit and data processing system having a configurable cache directory for an accelerator | Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, Curtis C. Wollbrink, Kenneth M. Valk +2 more | 2020-09-01 |
| 10713169 | Remote node broadcast of requests in a multinode data processing system | Eric E. Retter, Jeffrey A. Stuecheli, Derek E. Williams | 2020-07-14 |
| 10671537 | Reducing translation latency within a memory management unit using external caching structures | Guy L. Guthrie, Jody B. Joyner, Ronald Nick Kalla, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-06-02 |
| 10649902 | Reducing translation latency within a memory management unit using external caching structures | Guy L. Guthrie, Jody B. Joyner, Ronald Nick Kalla, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-05-12 |
| 10613980 | Coherence protocol providing speculative coherence response to directory probe | Guy L. Guthrie, David J. Krolak, Derek E. Williams | 2020-04-07 |
| 10613979 | Accelerator memory coherency with single state machine | Kenneth M. Valk, Guy L. Guthrie, Derek E. Williams, John D. Irish | 2020-04-07 |
| 10579527 | Remote node broadcast of requests in a multinode data processing system | Guy L. Guthrie, William J. Starke, Jeffrey A. Stuecheli, Derek E. Williams | 2020-03-03 |
| 10565140 | Techniques for issuing interrupts in a data processing system with multiple scopes | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel | 2020-02-18 |
| 10552351 | Techniques for issuing interrupts in a data processing system with multiple scopes | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel | 2020-02-04 |
| 10437725 | Master requesting missing segments of a cache line for which the master has coherence ownership | Guy L. Guthrie, William J. Starke, Jeffrey A. Stuecheli | 2019-10-08 |
| 10423550 | Managing efficient selection of a particular processor thread for handling an interrupt | Richard Louis Arndt, Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie +1 more | 2019-09-24 |
| 10394636 | Techniques for managing a hang condition in a data processing system with shared memory | Guy L. Guthrie, Charles F. Marino, Praveen S. Reddy | 2019-08-27 |
| 10387310 | Remote node broadcast of requests in a multinode data processing system | Eric E. Retter, Jeffrey A. Stuecheli, Derek E. Williams | 2019-08-20 |
| 10268617 | Frame format for a serial interface | Lonny Lambrecht, William S. Starke, Jeffrey A. Stuecheli | 2019-04-23 |
| 10223186 | Coherency error detection and reporting in a processor | John T. Hollaway, Jr., Charles F. Marino | 2019-03-05 |
| 10216653 | Pre-transmission data reordering for a serial interface | Lakshminarayana B. Arimilli, Yiftach Benjamini, Bartholomew Blaner, Daniel M. Dreps, John D. Irish +6 more | 2019-02-26 |
| 10210112 | Techniques for issuing interrupts in a data processing system with multiple scopes | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel | 2019-02-19 |