Issued Patents All Time
Showing 1–25 of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11074205 | Managing efficient selection of a particular processor thread for handling an interrupt | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie, Michael S. Siegel +1 more | 2021-07-27 |
| 10831593 | Live partition mobility enabled hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2020-11-10 |
| 10614010 | Handling queued interrupts in a data processing system based on a saturate value | Florian A. Auernhammer | 2020-04-07 |
| 10585744 | Managed hardware accelerator address translation fault resolution utilizing a credit | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2020-03-10 |
| 10572337 | Live partition mobility enabled hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2020-02-25 |
| 10545816 | Managed hardware accelerator address translation fault resolution utilizing a credit | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2020-01-28 |
| 10528418 | Hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2020-01-07 |
| 10437755 | Techniques for handling interrupts in a processing unit using virtual processor thread groups | Florian A. Auernhammer | 2019-10-08 |
| 10423550 | Managing efficient selection of a particular processor thread for handling an interrupt | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie, Michael S. Siegel +1 more | 2019-09-24 |
| 10289479 | Hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2019-05-14 |
| 10255194 | Configurable I/O address translation data structure | Benjamin Herrenschmidt, Eric N. Lais, Steven M. Thurber | 2019-04-09 |
| 10241923 | Configurable I/O address translation data structure | Benjamin Herrenschmidt, Eric N. Lais, Steven M. Thurber | 2019-03-26 |
| 10229075 | Techniques for escalating interrupts in a processing unit using virtual processor thread groups and software stack levels | Florian A. Auernhammer | 2019-03-12 |
| 10216568 | Live partition mobility enabled hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2019-02-26 |
| 10169270 | Techniques for handling interrupt related information in a data processing system | Florian A. Auernhammer | 2019-01-01 |
| 10114773 | Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels | Florian A. Auernhammer | 2018-10-30 |
| 10083142 | Addressing topology specific replicated bus units | Florian A. Auernhammer, Hugh Shen, Derek E. Williams | 2018-09-25 |
| 10061723 | Techniques for handling queued interrupts in a data processing system based on a saturation value | Florian A. Auernhammer | 2018-08-28 |
| 9904638 | Techniques for escalating interrupts in a data processing system to a higher software stack level | Florian A. Auernhammer, Bruce Mealey | 2018-02-27 |
| 9870329 | Techniques for escalating interrupts in a data processing system | Florian A. Auernhammer | 2018-01-16 |
| 9852091 | Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels | Florian A. Auernhammer | 2017-12-26 |
| 9792233 | Techniques for escalating interrupts in a data processing system to a higher software stack level | Florian A. Auernhammer | 2017-10-17 |
| 9792232 | Techniques for queueing interrupts in a data processing system | Florian A. Auernhammer | 2017-10-17 |
| 9779043 | Techniques for handling queued interrupts in a data processing system | Florian A. Auernhammer | 2017-10-03 |
| 9678901 | Techniques for indicating a preferred virtual processor thread to service an interrupt in a data processing system | Florian A. Auernhammer, Stuart Z. Jacobs, Wade B. Ouren | 2017-06-13 |