PK

Prabhakar Kudva

IBM: 36 patents #2,696 of 70,183Top 4%
SY Synopsys: 2 patents #669 of 2,302Top 30%
Overall (All Time): #93,025 of 4,157,543Top 3%
36
Patents All Time

Issued Patents All Time

Showing 25 most recent of 36 patents

Patent #TitleCo-InventorsDate
11934401 Scalable count based interpretability for database artificial intelligence (AI) Rajesh Bordawekar 2024-03-19
11557033 Bacteria classification Venkat K. Balagurusamy, Vince Siu, Sahil Dureja, Joseph W. Ligman, Matthew Harrison Tong +2 more 2023-01-17
11195145 Blockchain ledgers of material spectral signatures for supply chain integrity management Nicholas C. M. Fuller, Deborah A. Neumayer 2021-12-07
10685323 Blockchain ledgers of material spectral signatures for supply chain integrity management Nicholas C. M. Fuller, Deborah A. Neumayer 2020-06-16
10467586 Blockchain ledgers of material spectral signatures for supply chain integrity management Nicholas C. M. Fuller, Deborah A. Neumayer 2019-11-05
9811624 Timing closure methodology including placement with initial delay values Lukas P. P. P. van Ginneken 2017-11-07
9569582 Template matching for resilience and security characteristics of sub-component chip designs Eli Arbel, Pradip Bose, Shiri Moran, K. Paul Muller 2017-02-14
8949101 Hardware execution driven application level derating calculation for soft error rate analysis Pradip Bose, Meeta S. Gupta, Daniel A. Prener 2015-02-03
8832707 Tunable error resilience computing Daniel James Henderson, Naresh Nayar, Pia Naoko Sanda, David W. Siegel, James L. Van Oosten +1 more 2014-09-09
8639955 Method and system for controlling power in a chip through a power performance monitor and control unit Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher 2014-01-28
8621403 Timing closure methodology including placement with initial delay values Lukas P. P. P. van Ginneken 2013-12-31
8555234 Verification of soft error resilience Robert B. Tremaine, Mark A. Check, Pia Naoko Sanda 2013-10-08
8112642 Method and system for controlling power in a chip through a power-performance monitor and control unit Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher 2012-02-07
8091050 Modeling system-level effects of soft errors Pradip Bose, Jude A. Rivers, Pia Naoko Sanda, John-David Wellman 2012-01-03
8073668 Method and apparatus for testing a full system integrated circuit design by statistical fault injection using hardware-based simulation Jeffrey William Kellington, Naoko Pia Sanda, John A. Schumann 2011-12-06
7930578 Method and system of peak power enforcement via autonomous token-based control and management Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Zhigang Hu, Hans M. Jacobson +2 more 2011-04-19
7880194 Cross point switch using phase change material Matthew J. Breitwisch, Chung H. Lam 2011-02-01
7801835 Method for constructing autonomic advisors and learning procedural knowledge from scored examples Lawrence D. Bergman, Vittorio Castelli, Tessa A. Lau, Daniel Oblinger 2010-09-21
7723207 Three dimensional integrated circuit and method of design Syed M. Alam, Ibrahim M. Elfadel, Kathryn Guarini, Meikei Ieong, David S. Kung +2 more 2010-05-25
7685457 Interlocked synchronous pipeline clock gating Hans M. Jacobson, Pradip Bose, Peter W. Cook, Stanley E. Schuster 2010-03-23
7676779 Logic block timing estimation using conesize Reinaldo A. Bergamaschi, Sean Michael Carey, Brian W. Curran, Matthew E. Mariani, Mark D. Mayo +1 more 2010-03-09
7475227 Method of stalling one or more stages in an interlocked synchronous pipeline Hans M. Jacobson, Pradip Bose, Peter W. Cook, Stanley E. Schuster 2009-01-06
7421601 Method and system for controlling power in a chip through a power-performance monitor and control unit Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher 2008-09-02
7373615 Method for optimization of logic circuits for routability William E. Dougherty, Jr., Victor N. Kravets, Andrew J. Sullivan 2008-05-13
7312487 Three dimensional integrated circuit Syed M. Alam, Ibrahim M. Elfadel, Kathryn Guarini, Meikei Ieong, David S. Kung +2 more 2007-12-25