Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8832707 | Tunable error resilience computing | Prabhakar Kudva, Naresh Nayar, Pia Naoko Sanda, David W. Siegel, James L. Van Oosten +1 more | 2014-09-09 |
| 8099570 | Methods, systems, and computer program products for dynamic selective memory mirroring | James A. O'Connor, Kanwal Bahri, Luis A. Lastras-Montano, Warren E. Maule, Michael Mueller +6 more | 2012-01-17 |
| 7478268 | Deallocation of memory in a logically-partitioned computer | Alongkorn Kitamorn, Wayne Lemmon, Naresh Nayer, Wade B. Ouren | 2009-01-13 |
| 7085856 | Method and system for evaluating and optimizing placement of PCI adapters in a multi-partitioned server with respect to function, performance, and availability | Michael S. Stys, David R. Willoughby | 2006-08-01 |
| 7058782 | Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism | Alongkorn Kitamorn, Wayne Lemmon, Naresh Nayar, Ravi Shankar | 2006-06-06 |
| 6851071 | Apparatus and method of repairing a processor array for a failure detected at runtime | Douglas Craig Bossen, Raymond Hicks, Alongkorn Kitamorn, David Otto Lewis, Thomas A. Liebsch | 2005-02-01 |
| 6789048 | Method, apparatus, and computer program product for deconfiguring a processor | Richard Louis Arndt, Douglas Marvin Benignus, Douglas Craig Bossen, Alongkorn Kitamorn | 2004-09-07 |
| 6226720 | Method for optimally configuring memory in a mixed interleave system | James O. Nicholson, John Hughes Rost | 2001-05-01 |