Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7895493 | Bus failure management method and system | Zane Coy Shelley, Alwood P. Williams, III | 2011-02-22 |
| 7478268 | Deallocation of memory in a logically-partitioned computer | Daniel James Henderson, Alongkorn Kitamorn, Naresh Nayer, Wade B. Ouren | 2009-01-13 |
| 7089461 | Method and apparatus for isolating uncorrectable errors while system continues to run | Douglas Gilbert, Raymond Hicks | 2006-08-08 |
| 7058782 | Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism | Daniel James Henderson, Alongkorn Kitamorn, Naresh Nayar, Ravi Shankar | 2006-06-06 |
| 7007210 | Method and system for handling multiple bit errors to enhance system reliability | James Stephen Fields, Jr., Alongkorn Kitamorn, David Otto Lewis, Kevin F. Reick | 2006-02-28 |
| 4916637 | Customized instruction generator | LindaMay P. Allen, Ronald G. Elshaug, Carrie L. Harney, Irwin Miller, Irving L. Miller +11 more | 1990-04-10 |