| 7865747 |
Adaptive issue queue for reduced power at high performance |
Alper Buyuktosunoglu, Stanley E. Schuster, David M. Brooks, Pradip Bose, David Albonesi |
2011-01-04 |
$2,931,000 |
| 7685457 |
Interlocked synchronous pipeline clock gating |
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Stanley E. Schuster |
2010-03-23 |
$4,775,000 |
| 7475227 |
Method of stalling one or more stages in an interlocked synchronous pipeline |
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Stanley E. Schuster |
2009-01-06 |
$2,860,000 |
| 7308593 |
Interlocked synchronous pipeline clock gating |
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Stanley E. Schuster |
2007-12-11 |
$7,826,000 |
| 7134028 |
Processor with low overhead predictive supply voltage gating for leakage power reduction |
Pradip Bose, David M. Brooks, Philip G. Emma, Michael K. Gschwind, Stanley E. Schuster +1 more |
2006-11-07 |
$5,535,000 |
| 7076681 |
Processor with demand-driven clock throttling power reduction |
Pradip Bose, Daniel Citron, Philip G. Emma, Hans M. Jacobson, Prabhakar Kudva +3 more |
2006-07-11 |
$5,175,000 |
| 7065665 |
Interlocked synchronous pipeline clock gating |
Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Stanley E. Schuster |
2006-06-20 |
$5,983,000 |
| 6952113 |
Method of reducing leakage current in sub one volt SOI circuits |
Richard B. Brown, Ching-Te Chuang, Koushik K. Das, Rajiv V. Joshi |
2005-10-04 |
$13,353,000 |
| 6946869 |
Method and structure for short range leakage control in pipelined circuits |
Hans M. Jacobson, Pradip Bose, Alper Buyuktosunoglu, Philip G. Emma, Prabhakar Kudva +1 more |
2005-09-20 |
$5,282,000 |
| 6925549 |
Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stages |
Andrew D. Davies, Stanley E. Schuster, Daniel Stasiak |
2005-08-02 |
$7,293,000 |
| 6848060 |
Synchronous to asynchronous to synchronous interface |
Stanley E. Schuster |
2005-01-25 |
$10,247,000 |
| 6829716 |
Latch structure for interlocked pipelined CMOS (IPCMOS) circuits |
Stanley E. Schuster |
2004-12-07 |
$6,343,000 |
| 6775961 |
Web tensioning device |
Christopher Brunning |
2004-08-17 |
|
| 6608771 |
Low-power circuit structures and methods for content addressable memories and random access memories |
Hans M. Jacobson, Prabhakar Kudva, Stanley E. Schuster |
2003-08-19 |
$23,908,000 |
| 6512397 |
Circuit structures and methods for high-speed low-power select arbitration |
Hans M. Jacobson, Prabhakar Kudva, Stanley E. Schuster |
2003-01-28 |
$17,722,000 |
| 6505099 |
Radiant energy control system |
Martin Brice, Gordon M. Kay |
2003-01-07 |
|
| 6182233 |
Interlocked pipelined CMOS |
Stanley E. Schuster |
2001-01-30 |
$13,187,000 |
| 6006025 |
Method of clock routing for semiconductor chips |
Phillip J. Restle |
1999-12-21 |
$22,815,000 |
| 5301340 |
IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle |
— |
1994-04-05 |
$5,023,000 |
| 5148059 |
CMOS and ECL logic circuit requiring no interface circuitry |
Chih-Liang Chen, Lewis M. Terman |
1992-09-15 |
$12,539,000 |
| 4931970 |
Apparatus for determining if there is a loss of data during a shift operation |
Robert K. Montoye |
1990-06-05 |
$25,546,000 |
| 4931971 |
Partial decode shifter/rotator |
Robert K. Montoye |
1990-06-05 |
$25,546,000 |
| 4504924 |
Carry lookahead logical mechanism using affirmatively referenced transfer gates |
Hung-Hui Hsieh, Glen S. Miranker |
1985-03-12 |
$12,005,000 |
| 4199695 |
Avoidance of hot electron operation of voltage stressed bootstrap drivers |
Stanley E. Schuster |
1980-04-22 |
$38,913,000 |
