GM

Gary L. Milo

IBM: 10 patents #10,888 of 70,183Top 20%
Globalfoundries: 4 patents #817 of 4,424Top 20%
Overall (All Time): #321,532 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10056306 Test structure for monitoring interface delamination Edward C. Cooney, III, Thomas Warren Weeks, Jr., Patrick S. Spinney, John C. S. Hall, Brian P. Conchieri +2 more 2018-08-21
9825119 Semiconductor device with metal extrusion formation Max G. Levy, David C. Thomas 2017-11-21
9825120 Semiconductor device with metal extrusion formation Max G. Levy, David C. Thomas 2017-11-21
9577023 Metal wires of a stacked inductor Edward C. Cooney, III, Dinh Dang, David A. DeMuynck, Sarah A. McTaggart, Melissa J. Roma +2 more 2017-02-21
9548349 Semiconductor device with metal extrusion formation Max G. Levy, David C. Thomas 2017-01-17
9484301 Controlled metal extrusion opening in semiconductor structure and method of forming Max G. Levy, Matthew D. Moon, Anthony C. Speranza, Timothy D. Sullivan, David C. Thomas +1 more 2016-11-01
9435948 Silicon waveguide structure with arbitrary geometry on bulk silicon substrate, related systems and program products Robert K. Leidy, Mark D. Levy, Qizhi Liu, Steven M. Shank 2016-09-06
9231089 Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region Robert K. Leidy, Mark D. Levy, Qizhi Liu 2016-01-05
9196592 Methods of managing metal density in dicing channel and related integrated circuit structures Edward C. Cooney, III, Jeffrey P. Gambino, Richard S. Graf 2015-11-24
9059258 Controlled metal extrusion opening in semiconductor structure and method of forming Max G. Levy, Matthew D. Moon, Anthony C. Speranza, Timothy D. Sullivan, David C. Thomas +1 more 2015-06-16
9059233 Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region Robert K. Leidy, Mark D. Levy, Qizhi Liu 2015-06-16
8604618 Structure and method for reducing vertical crack propagation Edward C. Cooney, III, Jeffrey P. Gambino, Zhong-Xiang He, Xiao Hu Liu, Thomas L. McDevitt +1 more 2013-12-10
7332054 Etch apparatus Arne Ballantine, Scott A. Estes, Emily E. Fisch, Ronald A. Warren 2008-02-19
6699400 Etch process and apparatus therefor Arne Ballantine, Scott A. Estes, Emily E. Fisch, Ronald A. Warren 2004-03-02
6576507 Selectively removable filler layer for BiCMOS process Kenneth Bandy, Stuart D. Cheney, Yutong Wu 2003-06-10