Issued Patents All Time
Showing 26–50 of 98 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8850166 | Load pair disjoint facility and instruction therefore | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2014-09-30 |
| 8677098 | Dynamic address translation with fetch protection | Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer +1 more | 2014-03-18 |
| 8631216 | Dynamic address translation with change record override | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy Siegel | 2014-01-14 |
| 8621180 | Dynamic address translation with translation table entry format control for identifying format of the translation table entry | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel | 2013-12-31 |
| 8549255 | Microprocessor, method and computer program product for direct page prefetch in millicode capable computer system | David A. Schroter, Mark S. Farrell, Jennifer Serena Almoradie Navarro, Chung-Lung K. Shum | 2013-10-01 |
| 8527715 | Providing a shared memory translation facility | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Donald W. Schmidt +2 more | 2013-09-03 |
| 8407453 | Facilitating processing in a computing environment using an extended drain instruction | Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Bruce C. Giamei, Timothy J. Slegel | 2013-03-26 |
| 8380907 | Method, system and computer program product for providing filtering of GUEST2 quiesce requests | Lisa C. Heller, Damian L. Osisek | 2013-02-19 |
| 8131982 | Branch prediction instructions having mask values involving unloading and loading branch history data | Philip G. Emma, Allan M. Hartstein, Keith N. Langston, Brian R. Prasky, Thomas R. Puzak | 2012-03-06 |
| 8117417 | Dynamic address translation with change record override | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel | 2012-02-14 |
| 8112174 | Processor, method and computer program product for fast selective invalidation of translation lookaside buffer | Jonathan T. Hsieh, Chung-Lung K. Shum | 2012-02-07 |
| 8103851 | Dynamic address translation with translation table entry format control for indentifying format of the translation table entry | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel | 2012-01-24 |
| 8078843 | Facilitating processing in a computing environment using an extended drain instruction | Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Bruce C. Giamei, Timothy J. Slegel | 2011-12-13 |
| 8037278 | Dynamic address translation with format control | Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel | 2011-10-11 |
| 8032709 | System, method and computer program product for handling shared cache lines in a multi-processor environment | Chung-Lung K. Shum | 2011-10-04 |
| 8019964 | Dynamic address translation with DAT protection | Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer +1 more | 2011-09-13 |
| 7971034 | Reduced overhead address mode change management in a pipelined, recycling microprocessor | David S. Hutton, Michael Billeci, Fadi Y. Busaba, Brian R. Prasky, John G. Rell, Jr. +1 more | 2011-06-28 |
| 7966453 | Method and apparatus for active software disown of cache line's exlusive rights | Chung-Lung K. Shum, Kathryn Marie Jackson | 2011-06-21 |
| 7966474 | System, method and computer program product for translating storage elements | Chung-Lung K. Shum, Fadi Y. Busaba, Mark S. Farrell, Bruce C. Giamei, Bernd Nerz +1 more | 2011-06-21 |
| 7953932 | System and method for avoiding deadlocks when performing storage updates in a multi-processor environment | Chung-Lung K. Shum, Brian D. Barrick, Aaron Tsai | 2011-05-31 |
| 7882338 | Method, system and computer program product for an implicit predicted return from a predicted subroutine | Khary J. Alexander, James J. Bonanno, Brian R. Prasky, Anthony Saporito, Robert J. Sonnelitter, III | 2011-02-01 |
| 7712076 | Register indirect access of program floating point registers by millicode | Steven R. Carlough, Mark S. Farrell, Eric M. Schwarz, Timothy J. Slegel | 2010-05-04 |
| 7478185 | Directly initiating by external adapters the setting of interruption initiatives | Douglas G. Balazich, Michael Campbell, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg +2 more | 2009-01-13 |
| 6952763 | Write before read interlock for recovery unit operands | Scott Barnett Swaney, Mark S. Farrell, Robert F. Hatch, David P. Hillerud | 2005-10-04 |
| 6865645 | Program store compare handling between instruction and operand caches | Chung-Lung K. Shum, Dean G. Bair, Mark A. Check, John S. Liptay | 2005-03-08 |