| 9792124 |
Speculative branch handling for transaction abort |
James J. Bonanno, Adam B. Collura, Christian Jacobi, Anthony Saporito, Timothy J. Slegel |
2017-10-17 |
| 9720764 |
Uncorrectable memory errors in pipelined CPUs |
Uwe Brandt, Christian Jacobi, Martin Recktenwald |
2017-08-01 |
| 9665376 |
Sharing program interrupt logic in a multithreaded processor |
Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Christian Jacobi, Timothy J. Slegel |
2017-05-30 |
| 9619237 |
Speculative branch handling for transaction abort |
James J. Bonanno, Adam B. Collura, Christian Jacobi, Anthony Saporito, Timothy J. Slegel |
2017-04-11 |
| 9507602 |
Sharing program interrupt logic in a multithreaded processor |
Khary J. Alexander, Fadi Y. Busaba, Mark S. Farrell, Christian Jacobi, Timothy J. Slegel |
2016-11-29 |
| 9454377 |
Speculative branch handling for transaction abort |
James J. Bonanno, Adam B. Collura, Christian Jacobi, Anthony Saporito, Timothy Siegel |
2016-09-27 |
| 9323640 |
Method and system for measuring the performance of a computer system on a per logical partition basis |
Jane H. Bartik, Lisa C. Heller, Donald G. O'Brien, Bruce Wagar, Patrick M. West, Jr. |
2016-04-26 |
| 9075600 |
Program status word dependency handling in an out of order microprocessor design |
Gregory W. Alexander, Brian D. Barrick, Fadi Y. Busaba, Bruce C. Giamei, David A. Schroter |
2015-07-07 |
| 8683180 |
Intermediate register mapper |
Brian D. Barrick, Lee Evan Eisen |
2014-03-25 |
| 8516228 |
Supporting partial recycle in a pipelined microprocessor |
Khary J. Alexander, Fadi Y. Busaba, Bruce C. Giamei |
2013-08-20 |
| 8453124 |
Collecting computer processor instrumentation data |
Gregory W. Alexander, Jane H. Bartik, David S. Hutton, Christian Jacobi, Jang-Soo Lee +3 more |
2013-05-28 |
| 8209668 |
Method and system for measuring the performance of a computer system on a per logical partition basis |
Jane H. Bartik, Lisa C. Heller, Donald G. O'Brien, Bruce Wagar, Patrick M. West, Jr. |
2012-06-26 |
| 8201067 |
Processor error checking for instruction data |
Fadi Y. Busaba, Khary J. Alexander, Bruce C. Giamei, Vimal M. Kapadia |
2012-06-12 |
| 7971034 |
Reduced overhead address mode change management in a pipelined, recycling microprocessor |
David S. Hutton, Fadi Y. Busaba, Brian R. Prasky, John G. Rell, Jr., Chung-Lung K. Shum +1 more |
2011-06-28 |
| 7889569 |
System, method and storage medium for controlling asynchronous updates to a register |
— |
2011-02-15 |
| 7814374 |
System and method for the capture and preservation of intermediate error state data |
Douglas G. Balazich, Anthony Saporito, Timothy J. Slegel |
2010-10-12 |
| 7805634 |
Error accumulation register, error accumulation method, and error accumulation system |
Douglas G. Balazich, Anthony Saporito, Timothy J. Slegel |
2010-09-28 |
| 7480833 |
Method and system for performing a hardware trace |
Timothy J. Slegal |
2009-01-20 |
| 7380077 |
System, method and storage medium for controlling asynchronous updates to a register |
— |
2008-05-27 |
| 7278063 |
Method and system for performing a hardware trace |
Timothy J. Slegel |
2007-10-02 |
| 7225305 |
System, method and storage medium for controlling asynchronous updates to a register |
— |
2007-05-29 |
| 7146520 |
Method and apparatus for controlling clocks in a processor with mirrored units |
Timothy G. McNamara, Ching-Lung Tong, David A. Webber |
2006-12-05 |
| 7111196 |
System and method for providing processor recovery in a multi-core system |
Douglas G. Balazich, Anthony Saporito, Timothy J. Slegel |
2006-09-19 |
| 7082550 |
Method and apparatus for mirroring units within a processor |
Chung-Lung K. Shum, Timothy J. Slegel |
2006-07-25 |
