Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6865645 | Program store compare handling between instruction and operand caches | Chung-Lung K. Shum, Dean G. Bair, Charles F. Webb, Mark A. Check | 2005-03-08 |
| 6751708 | Method for ensuring that a line is present in an instruction cache | Mark A. Check, Mark S. Farrell, Bruce C. Giamei, Charles F. Webb | 2004-06-15 |
| 6745313 | Absolute address bits kept in branch history table | Mark A. Check, Brian R. Prasky, Chung-Lung K. Shum | 2004-06-01 |
| 6671794 | Address generation interlock detection | Bruce C. Giamei, Mark A. Check | 2003-12-30 |
| 6662296 | Method and system for testing millicode branch points | Mark S. Farrell, Charles F. Webb | 2003-12-09 |
| 6138223 | Absolute address history table index generation for predicting instruction and operand cache accesses | Mark A. Check | 2000-10-24 |
| 6125444 | Millimode capable computer system providing global branch history table disables and separate millicode disables which enable millicode disable to be turned off for some sections of code execution but not disabled for all | Mark A. Check, Timothy J. Slegel, Charles F. Webb, Mark S. Farrell | 2000-09-26 |
| 6108776 | Globally or selectively disabling branch history table operations during sensitive portion of millicode routine in millimode supporting computer | Mark A. Check, Timothy J. Slegel, Charles F. Webb, Mark S. Farrell | 2000-08-22 |
| 6105126 | Address bit decoding for same adder circuitry for RXE instruction format with same XBD location as RX format and dis-jointed extended operation code | Mark A. Check, Ronald M. Smith, Sr., Eric M. Schwarz, Timothy J. Slegel, Charles F. Webb | 2000-08-15 |
| 6085313 | Computer processor system for executing RXE format floating point instructions | Mark A. Check, Ronald M. Smith, Sr., Eric M. Schwarz, Timothy J. Slegel, Charles F. Webb | 2000-07-04 |
| 6035392 | Computer with optimizing hardware for conditional hedge fetching into cache storage | Mark A. Check, Barry W. Krumm, Jennifer A. Navarro, Charles F. Webb | 2000-03-07 |
| 6026488 | Method for conditional hedge fetching into cache storage | Mark A. Check, Barry W. Krumm, Jennifer A. Navarro, Charles F. Webb | 2000-02-15 |
| 5903479 | Method and system for executing denormalized numbers | Eric M. Schwarz, Bruce C. Giamei, Christopher A. Krygowski, Mark A. Check | 1999-05-11 |
| 5790844 | Millicode load and test access instruction that blocks interrupts in response to access exceptions | Charles F. Webb, Mark S. Farrell, Mark A. Check | 1998-08-04 |
| 5748951 | Specialized millicode instructions which reduce cycle time and number of instructions necessary to perform complex operations | Charles F. Webb, Mark S. Farrell, Mark A. Check | 1998-05-05 |
| 5713035 | Linking program access register number with millicode operand access | Mark S. Farrell, Barry W. Krumm, Charles F. Webb, Steven QiHong Ying | 1998-01-27 |
| 5694587 | Specialized millicode instructions for test PSW validity, load with access test, and character translation assist | Charles F. Webb, Mark S. Farrell, Mark A. Check | 1997-12-02 |
| 5649155 | Cache memory accessed by continuation requests | Barry W. Krumm, Steven T. Comfort, Jin Song Ji, Charles F. Webb, David Man Chow Wong +1 more | 1997-07-15 |
| 5625808 | Read only store as part of cache store for storing frequently used millicode instructions | Charles F. Webb, Mark S. Farrell, Barry W. Krumm, Jennifer Serena Almoradie Navarro, Steven Risch +1 more | 1997-04-29 |
| 5504859 | Data processor with enhanced error recovery | Richard N. Gustafson, Charles F. Webb | 1996-04-02 |
| 5495587 | Method for processing checkpoint instructions to allow concurrent execution of overlapping instructions | Steven T. Comfort, Clifford O. Hayden, Susan B. Stillman, Charles F. Webb | 1996-02-27 |
| 5495590 | Checkpoint synchronization with instruction overlap enabled | Steven T. Comfort, Clifford O. Hayden, Susan B. Stillman, Charles F. Webb | 1996-02-27 |
| 5257354 | System for monitoring and undoing execution of instructions beyond a serialization point upon occurrence of in-correct results | Steven T. Comfort, Charles F. Webb | 1993-10-26 |
| 5134561 | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries | — | 1992-07-28 |
| 4901233 | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries | — | 1990-02-13 |