Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8309457 | Multilayer low reflectivity hard mask and process therefor | Kouros Ghandehari, Marina V. Plat, Hirokazu Tokuno | 2012-11-13 |
| 8048797 | Multilayer low reflectivity hard mask and process therefor | Kouros Ghandehari, Marina V. Plat, Hirokazu Tokuno | 2011-11-01 |
| 7538026 | Multilayer low reflectivity hard mask and process therefor | Kouros Ghandehari, Marina V. Plat, Hirokazu Tokuno | 2009-05-26 |
| 7507661 | Method of forming narrowly spaced flash memory contact openings and lithography masks | Emmanuil H. Lingunis, Ning Cheng, Mark T. Ramsbey, Kouros Ghandehari, Hung-Eil Kim | 2009-03-24 |
| 7427457 | Methods for designing grating structures for use in situ scatterometry to detect photoresist defects | Marina V. Plat, Calvin T. Gabriel, Christopher F. Lyons | 2008-09-23 |
| 7384725 | System and method for fabricating contact holes | Cyrus E. Tabery, Hung-Eil Kim, Jongwook Kye | 2008-06-10 |
| 7112489 | Negative resist or dry develop process for forming middle of line implant layer | Christopher F. Lyons, Marina V. Plat | 2006-09-26 |
| 7018922 | Patterning for elongated VSS contact flash memory | Hung-Eil Kim, Christopher F. Lyons, Marina V. Plat, Ramkumar Subramanian | 2006-03-28 |
| 6900124 | Patterning for elliptical Vss contact on flash memory | Hung-Eil Kim, Christopher F. Lyons, Marina V. Plat, Ramkumar Subramanian | 2005-05-31 |
| 6562639 | Utilizing electrical performance data to predict CD variations across stepper field | Luigi Capodieci, Christopher A. Spence | 2003-05-13 |
| 6493063 | Critical dimension control improvement method for step and scan photolithography | Rolf Seltmann | 2002-12-10 |
| 6255125 | Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer | Regina Tien Schmidt, Christopher A. Spence, Marina V. Plat, Khanh B. Nguyen | 2001-07-03 |
| 5985498 | Method of characterizing linewidth errors in a scanning lithography system | Harry J. Levinson, Khanh B. Nguyen | 1999-11-16 |
| 5963816 | Method for making shallow trench marks | Larry Wang, Craig S. Sander | 1999-10-05 |