Issued Patents All Time
Showing 326–350 of 404 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6768203 | Open-bottomed via liner structure and method for fabricating same | Andrew H. Simon | 2004-07-27 |
| 6716084 | Carrier head for holding a wafer and allowing processing on a front face thereof to occur | Bulent M. Basol, Konstantin Volodarsky | 2004-04-06 |
| 6709562 | Method of making electroplated interconnection structures on integrated circuit chips | Panayotis Andricacos, Hariklia Deligianni, John O. Dukovic, Daniel C. Edelstein, Wilma Jean Horkans +4 more | 2004-03-23 |
| 6695962 | Anode designs for planar metal deposits with enhanced electrolyte solution blending and process of supplying electrolyte solution using such designs | Homayoun Talieh, Bulent M. Basol | 2004-02-24 |
| 6692588 | Method and apparatus for simultaneously cleaning and annealing a workpiece | Homayoun Talieh | 2004-02-17 |
| 6685814 | Method for enhancing the uniformity of electrodeposition or electroetching | Hariklia Deligianni, John O. Dukovic | 2004-02-03 |
| 6666959 | Semiconductor workpiece proximity plating methods and apparatus | Homayoun Talieh, Bulent M. Basol, Douglas W. Young | 2003-12-23 |
| 6649523 | Method and system to provide material removal and planarization employing a reactive pad | Bulent M. Basol, Homayoun Talieh | 2003-11-18 |
| 6630059 | Workpeice proximity plating apparatus | Homayoun Talieh, Bulent M. Basol, Douglas W. Young | 2003-10-07 |
| 6612915 | Work piece carrier head for plating and polishing | Boguslaw Nagorski, Konstantin Volodarsky, Douglas W. Young | 2003-09-02 |
| 6610190 | Method and apparatus for electrodeposition of uniform film with minimal edge exclusion on substrate | Bulent M. Basol, Homayoun Talieh | 2003-08-26 |
| 6600230 | Seedlayer for plating metal in deep submicron structures | Peter S. Locke | 2003-07-29 |
| 6582579 | Methods for repairing defects on a semiconductor substrate | — | 2003-06-24 |
| 6572982 | Electromigration-resistant copper microstructure | Steven H. Boettcher, Patrick W. DeHaven, Christopher C. Parks, Andrew H. Simon | 2003-06-03 |
| 6569783 | Graded composition diffusion barriers for chip wiring applications | Daniel C. Edelstein, Andrew H. Simon | 2003-05-27 |
| 6497800 | Device providing electrical contact to the surface of a semiconductor workpiece during metal plating | Homayoun Talieh, Bulent M. Basol | 2002-12-24 |
| 6492262 | Process and structure for an interlock and high performance multilevel structures for chip interconnects and packaging technologies | — | 2002-12-10 |
| 6482307 | Method of and apparatus for making electrical contact to wafer surface for full-face electroplating or electropolishing | Jalal Ashjaee, Boguslaw Nagorski, Bulent M. Basol, Homayoun Talieh | 2002-11-19 |
| 6478936 | Anode assembly for plating and planarizing a conductive layer | Rimma Volodarsky, Konstantin Volodarsky, Homayoun Talieh, Douglas W. Young | 2002-11-12 |
| 6465376 | Method and structure for improving electromigration of chip interconnects | Daniel C. Edelstein, Andrew H. Simon | 2002-10-15 |
| 6437440 | Thin film metal barrier for electrical interconnections | Cyril Cabral, Jr., Patrick W. DeHaven, Daniel C. Edelstein, David P. Klaus, James Manley Pollard, III +1 more | 2002-08-20 |
| 6429519 | Wiring structures containing interconnected metal and wiring levels including a continuous, single crystalline or polycrystalline conductive material having one or more twin boundaries | — | 2002-08-06 |
| 6413388 | Pad designs and structures for a versatile materials processing apparatus | Bulent M. Basol, Homayoun Talieh | 2002-07-02 |
| 6413403 | Method and apparatus employing pad designs and structures with improved fluid distribution | Paul Lindquist, Bulent M. Basol, Homayoun Talieh | 2002-07-02 |
| 6413854 | Method to build multi level structure | Daniel C. Edelstein, Cheryl G. Faltermeier, Peter S. Locke | 2002-07-02 |