Issued Patents All Time
Showing 151–175 of 211 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9606770 | Multiply add functional unit capable of executing SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE and CLASS instructions | Cristina S. Anderson, Simon Rubanovich, Benny Eitan, Amit Gradstein | 2017-03-28 |
| 9588764 | Apparatus and method of improved extract instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney +1 more | 2017-03-07 |
| 9582464 | Systems, apparatuses, and methods for performing a double blocked sum of absolute differences | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Robert Valentine, Amit Gradstein, Simon Rubanovich | 2017-02-28 |
| 9542154 | Fused multiply add operations using bit masks | Simon Rubanovich, Thierry Pons, Amit Gradstein | 2017-01-10 |
| 9529592 | Vector mask memory access instructions to perform individual and sequential memory access operations if an exception occurs during a full width memory access operation | Doron Orenstien, Bob Valentine, Benny Eitan | 2016-12-27 |
| 9519324 | Local power gate (LPG) interfaces for power-aware operations | Michael Mishaeli, Ron Gabor, Robert Valentine, Alex Gerber | 2016-12-13 |
| 9513918 | Apparatus and method for performing permute operations | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Mostafa Hagog, Jesus Corbal, Bret L. Toll +3 more | 2016-12-06 |
| 9495162 | Apparatus and method for performing a permute operation | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Mostafa Hagog, Jesus Corbal, Tal Uliel +1 more | 2016-11-15 |
| 9489198 | Method and apparatus for performing logical compare operations | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2016-11-08 |
| 9459865 | Systems, apparatuses, and methods for performing a butterfly horizontal and cross add or substract in response to a single instruction | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Robert Valentine, Amit Gradstein, Simon Rubanovich | 2016-10-04 |
| 9411395 | Method and apparatus to control current transients in a processor | Nir Rosenzweig, Efraim Rotem | 2016-08-09 |
| 9396056 | Conditional memory fault assist suppression | Robert Valentine, Offer Levy, Michael Mishaeli, Gal Ofir | 2016-07-19 |
| 9292362 | Method and apparatus to protect a processor against excessive power usage | Lev Makovsky, Efraim Rotem, Nir Rosenzweig, Stanislav Shwartsman, Raanan Sade +4 more | 2016-03-22 |
| 9274752 | Leading change anticipator logic | Simon Rubanovich, Thierry Pons, Amit Gradstein | 2016-03-01 |
| 9268565 | Method and apparatus for performing logical compare operations | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2016-02-23 |
| 9262163 | Real time instruction trace processors, methods, and systems | Tsvika Kurts, Ofer Levy, Itamar Kazachinsky, Gabi Malka, Jason W. Brandt | 2016-02-16 |
| 9229524 | Performing local power gating in a processor | Nadav Bonen, Ron Gabor, Vjekoslav Svilan, David N. Mackintosh, Jose Angel Paredes +2 more | 2016-01-05 |
| 9170813 | Method and apparatus for performing logical compare operations | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2015-10-27 |
| 9092226 | Efficient parallel floating point exception handling in a processor | Shachar Finkelstein, Gregory Pribush, Amit Gradstein, Guy Bale, Thierry Pons | 2015-07-28 |
| 9043379 | Method and apparatus for performing logical compare operation | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2015-05-26 |
| 9037626 | Method and apparatus for performing logical compare operations | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2015-05-19 |
| 9037627 | Method and apparatus for performing logical compare operations | Rajiv Kapoor, Ronen Zohar, Mark Buxton, Koby Gottlieb | 2015-05-19 |
| 8972697 | Gather using index array and finite state machine | Robert Valentine, Guy Patkin, Stanislav Shwartsman, Shlomo Raikin, Igor Yanover +1 more | 2015-03-03 |
| 8914613 | Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a same set of per-lane control bits | Robert Valentine, Benny Eitan, Doron Orenstein | 2014-12-16 |
| 8914617 | Tracking mechanism coupled to retirement in reorder buffer for indicating sharing logical registers of physical register in record indexed by logical register | Shlomo Raikin, David J. Sager, Evgeni Krimer, Ori Lempel, Stanislav Shwartsman +2 more | 2014-12-16 |