Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12339741 | Bit efficient memory error correcting coding and decoding scheme | Fabrice Aidan | 2025-06-24 |
| 12321260 | Memory space assignment for memory controllers in non-power of two quantities | — | 2025-06-03 |
| 12248368 | Memory device and module life expansion | Fabrice Aidan | 2025-03-11 |
| 11175922 | Coarse-grain reconfigurable array processor with concurrent handling of multiple graphs on a single grid | Yoav Etsion, Dani Voitsechov, Jonathan Friedmann | 2021-11-16 |
| 8914617 | Tracking mechanism coupled to retirement in reorder buffer for indicating sharing logical registers of physical register in record indexed by logical register | Shlomo Raikin, David J. Sager, Zeev Sperber, Ori Lempel, Stanislav Shwartsman +2 more | 2014-12-16 |
| 8812823 | Memory disambiguation techniques using counter ratio to selectively disable load/store conflict prediction | Guillermo Savransky, Idan Mondjak, Jacob Doweck | 2014-08-19 |
| 8549263 | Counter-based memory disambiguation techniques for selectively predicting load/store conflicts | Guillermo Savransky, Idan Mondjak, Jacob Doweck | 2013-10-01 |
| 7590825 | Counter-based memory disambiguation techniques for selectively predicting load/store conflicts | Guillermo Savransky, Idan Mondjak, Jacob Doweck | 2009-09-15 |
| 6601155 | Hot way caches: an energy saving technique for high performance caches | Bishara Shomar, Ronny Ronen | 2003-07-29 |