Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399718 | Apparatuses, methods, and systems for hashing instructions | Regev Shemy, Zeev Sperber, Wajdi K. Feghali, Vinodh Gopal, Amit Gradstein +5 more | 2025-08-26 |
| 12021980 | Restricting usage of encryption keys by untrusted software | Ido Ouziel, Arie Aharon, Dror Caspi, Baruch Chaikin, Gideon Gerzon +7 more | 2024-06-25 |
| 11681530 | Apparatuses, methods, and systems for hashing instructions | Regev Shemy, Zeev Sperber, Wajdi K. Feghali, Vinodh Gopal, Amit Gradstein +5 more | 2023-06-20 |
| 11567772 | Apparatuses, methods, and systems for hashing instructions | Regev Shemy, Zeev Sperber, Wajdi K. Feghali, Vinodh Gopal, Amit Gradstein +5 more | 2023-01-31 |
| 11461244 | Co-existence of trust domain architecture with multi-key total memory encryption technology in servers | Ido Ouziel, Arie Aharon, Dror Caspi, Baruch Chaikin, Gideon Gerzon +8 more | 2022-10-04 |
| 11188335 | Apparatuses, methods, and systems for hashing instructions | Regev Shemy, Zeev Sperber, Wajdi K. Feghali, Vinodh Gopal, Amit Gradstein +5 more | 2021-11-30 |
| 11139967 | Restricting usage of encryption keys by untrusted software | Ido Ouziel, Arie Aharon, Dror Caspi, Baruch Chaikin, Gideon Gerzon +7 more | 2021-10-05 |
| 11074191 | Linear to physical address translation with support for page attributes | Ben-Zion Friedman, Eliezer Weissmann, James B. Crossland, Ohad Falik | 2021-07-27 |
| 10824428 | Apparatuses, methods, and systems for hashing instructions | Regev Shemy, Zeev Sperber, Wajdi K. Feghali, Vinodh Gopal, Amit Gradstein +5 more | 2020-11-03 |
| 9164917 | Linear to physical address translation with support for page attributes | Ohad Falik, Ben-Zion Friedman, Eliezer Weissmann, James B. Crossland | 2015-10-20 |
| 9164916 | Linear to physical address translation with support for page attributes | Ohad Falik, Ben-Zion Friedman, Eliezer Weissmann, James B. Crossland | 2015-10-20 |
| 9076019 | Method and apparatus for memory encryption with integrity check and protection against replay attacks | Shay Gueron, Uday Savagaonkar, Francis X. McKeen, Carlos V. Rozas, David M. Durham +4 more | 2015-07-07 |
| 8812823 | Memory disambiguation techniques using counter ratio to selectively disable load/store conflict prediction | Evgeni Krimer, Guillermo Savransky, Idan Mondjak | 2014-08-19 |
| 8549263 | Counter-based memory disambiguation techniques for selectively predicting load/store conflicts | Evgeni Krimer, Guillermo Savransky, Idan Mondjak | 2013-10-01 |
| 8468365 | Tweakable encryption mode for memory encryption with protection against replay attacks | Shay Gueron, Gideon Gerzon, Ittai Anati, Moshe Maor | 2013-06-18 |
| 7590825 | Counter-based memory disambiguation techniques for selectively predicting load/store conflicts | Evgeni Krimer, Guillermo Savransky, Idan Mondjak | 2009-09-15 |
| 7395299 | System and method for efficient hardware implementation of a perfect precision blending function | Tom Altus | 2008-07-01 |
| 6584483 | System and method for efficient hardware implementation of a perfect precision blending function | Tom Altus | 2003-06-24 |
| 6560671 | Method and apparatus for accelerating exchange or swap instructions using a register alias table (RAT) and content addressable memory (CAM) with logical register numbers as input addresses | Nicholas Samra | 2003-05-06 |
| 6470435 | Dual state rename recovery using register usage | Nicholas Samra, Belliappa Kuttanna | 2002-10-22 |
| 5928352 | Method and apparatus for implementing a fully-associative translation look-aside buffer having a variable numbers of bits representing a virtual address entry | Simcha Gochman | 1999-07-27 |
| 5860147 | Method and apparatus for replacement of entries in a translation look-aside buffer | Simcha Gochman | 1999-01-12 |